Lines Matching refs:rtex
1259 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
1269 if (rtex->is_depth && !rtex->is_flushing_texture) {
1271 rtex = rtex->flushed_depth_texture;
1272 assert(rtex);
1275 offset = rtex->surface.level[level].offset;
1276 if (rtex->surface.level[level].mode < RADEON_SURF_MODE_1D) {
1277 offset += rtex->surface.level[level].slice_size *
1280 pitch = rtex->surface.level[level].nblk_x / 8 - 1;
1281 slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64;
1286 switch (rtex->surface.level[level].mode) {
1331 if (rtex->resource.b.b.usage == PIPE_USAGE_STAGING) {
1399 &rtex->resource.b.b);
1401 &rtex->resource.b.b);
1403 if (rtex->cmask_size) {
1404 surf->cb_color_cmask = rtex->cmask_offset >> 8;
1405 surf->cb_color_mask |= S_028100_CMASK_BLOCK_MAX(rtex->cmask_slice_tile_max);
1407 if (rtex->fmask_size) {
1409 surf->cb_color_fmask = rtex->fmask_offset >> 8;
1424 r600_texture_get_cmask_info(rscreen, rtex, &cmask);
1425 r600_texture_get_fmask_info(rscreen, rtex, 8, &fmask);
1466 if (rtex->surface.level[level].mode < RADEON_SURF_MODE_1D) {
1479 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
1483 offset = rtex->surface.level[level].offset;
1484 pitch = rtex->surface.level[level].nblk_x / 8 - 1;
1485 slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64;
1489 switch (rtex->surface.level[level].mode) {
1509 surf->db_prefetch_limit = (rtex->surface.level[level].nblk_y / 8) - 1;
1587 struct r600_texture *rtex;
1616 rtex = (struct r600_texture*)res;
1649 if (rtex->fmask_size && rtex->cmask_size) {
