Lines Matching refs:v2i64
66 (int)MVT::v2i64
94 (int)MVT::v2i64
122 if (VT != MVT::i64 && VT != MVT::v2i64) {
175 setOperationAction(ISD::MULHU, MVT::v2i64, Expand);
177 setOperationAction(ISD::MULHS, MVT::v2i64, Expand);
178 setOperationAction(ISD::ADD, MVT::v2i64, Expand);
179 setOperationAction(ISD::SREM, MVT::v2i64, Expand);
181 setOperationAction(ISD::SDIV, MVT::v2i64, Expand);
182 setOperationAction(ISD::TRUNCATE, MVT::v2i64, Expand);
183 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Expand);
184 setOperationAction(ISD::ZERO_EXTEND, MVT::v2i64, Expand);
185 setOperationAction(ISD::ANY_EXTEND, MVT::v2i64, Expand);
