Lines Matching defs:fp2
7401 TCGv_i32 fp2 = tcg_temp_new_i32();
7405 gen_load_fpr32(fp2, fr);
7406 gen_helper_float_muladd_s(fp2, cpu_env, fp0, fp1, fp2);
7409 gen_store_fpr32(fp2, fd);
7410 tcg_temp_free_i32(fp2);
7420 TCGv_i64 fp2 = tcg_temp_new_i64();
7424 gen_load_fpr64(ctx, fp2, fr);
7425 gen_helper_float_muladd_d(fp2, cpu_env, fp0, fp1, fp2);
7428 gen_store_fpr64(ctx, fp2, fd);
7429 tcg_temp_free_i64(fp2);
7438 TCGv_i64 fp2 = tcg_temp_new_i64();
7442 gen_load_fpr64(ctx, fp2, fr);
7443 gen_helper_float_muladd_ps(fp2, cpu_env, fp0, fp1, fp2);
7446 gen_store_fpr64(ctx, fp2, fd);
7447 tcg_temp_free_i64(fp2);
7456 TCGv_i32 fp2 = tcg_temp_new_i32();
7460 gen_load_fpr32(fp2, fr);
7461 gen_helper_float_mulsub_s(fp2, cpu_env, fp0, fp1, fp2);
7464 gen_store_fpr32(fp2, fd);
7465 tcg_temp_free_i32(fp2);
7475 TCGv_i64 fp2 = tcg_temp_new_i64();
7479 gen_load_fpr64(ctx, fp2, fr);
7480 gen_helper_float_mulsub_d(fp2, cpu_env, fp0, fp1, fp2);
7483 gen_store_fpr64(ctx, fp2, fd);
7484 tcg_temp_free_i64(fp2);
7493 TCGv_i64 fp2 = tcg_temp_new_i64();
7497 gen_load_fpr64(ctx, fp2, fr);
7498 gen_helper_float_mulsub_ps(fp2, cpu_env, fp0, fp1, fp2);
7501 gen_store_fpr64(ctx, fp2, fd);
7502 tcg_temp_free_i64(fp2);
7511 TCGv_i32 fp2 = tcg_temp_new_i32();
7515 gen_load_fpr32(fp2, fr);
7516 gen_helper_float_nmuladd_s(fp2, cpu_env, fp0, fp1, fp2);
7519 gen_store_fpr32(fp2, fd);
7520 tcg_temp_free_i32(fp2);
7530 TCGv_i64 fp2 = tcg_temp_new_i64();
7534 gen_load_fpr64(ctx, fp2, fr);
7535 gen_helper_float_nmuladd_d(fp2, cpu_env, fp0, fp1, fp2);
7538 gen_store_fpr64(ctx, fp2, fd);
7539 tcg_temp_free_i64(fp2);
7548 TCGv_i64 fp2 = tcg_temp_new_i64();
7552 gen_load_fpr64(ctx, fp2, fr);
7553 gen_helper_float_nmuladd_ps(fp2, cpu_env, fp0, fp1, fp2);
7556 gen_store_fpr64(ctx, fp2, fd);
7557 tcg_temp_free_i64(fp2);
7566 TCGv_i32 fp2 = tcg_temp_new_i32();
7570 gen_load_fpr32(fp2, fr);
7571 gen_helper_float_nmulsub_s(fp2, cpu_env, fp0, fp1, fp2);
7574 gen_store_fpr32(fp2, fd);
7575 tcg_temp_free_i32(fp2);
7585 TCGv_i64 fp2 = tcg_temp_new_i64();
7589 gen_load_fpr64(ctx, fp2, fr);
7590 gen_helper_float_nmulsub_d(fp2, cpu_env, fp0, fp1, fp2);
7593 gen_store_fpr64(ctx, fp2, fd);
7594 tcg_temp_free_i64(fp2);
7603 TCGv_i64 fp2 = tcg_temp_new_i64();
7607 gen_load_fpr64(ctx, fp2, fr);
7608 gen_helper_float_nmulsub_ps(fp2, cpu_env, fp0, fp1, fp2);
7611 gen_store_fpr64(ctx, fp2, fd);
7612 tcg_temp_free_i64(fp2);
