Lines Matching refs:Iex
488 if (guard->tag == Iex_Const && guard->Iex.Const.con->tag == Ico_U1
489 && guard->Iex.Const.con->Ico.U1 == True) {
591 if (guard->tag == Iex_Const && guard->Iex.Const.con->tag == Ico_U1
592 && guard->Iex.Const.con->Ico.U1 == True) {
721 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64
722 && e->Iex.Binop.arg2->tag == Iex_Const
723 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64
725 uLong_is_4_aligned(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64) : True)
726 && uLong_fits_in_16_bits(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)) {
727 return MIPSAMode_IR((Int) e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,
728 iselWordExpr_R(env, e->Iex.Binop.arg1));
732 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64) {
733 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
734 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
742 && e->Iex.Binop.op == Iop_Add32
743 && e->Iex.Binop.arg2->tag == Iex_Const
744 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32
745 && uInt_fits_in_16_bits(e->Iex.Binop.arg2->Iex.Const.con-> Ico.U32)) {
746 return MIPSAMode_IR((Int) e->Iex.Binop.arg2->Iex.Const.con->Ico.U32,
747 iselWordExpr_R(env, e->Iex.Binop.arg1));
751 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add32) {
752 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
753 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
804 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
809 MIPSAMode *am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, ty);
811 if (e->Iex.Load.end != Iend_LE
812 && e->Iex.Load.end != Iend_BE)
826 switch (e->Iex.Binop.op) {
877 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
886 e->Iex.Binop.arg2);
892 e->Iex.Binop.arg2);
902 switch (e->Iex.Binop.op) {
923 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
926 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
928 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
963 if (e->Iex.Binop.op == Iop_CmpEQ32
964 || e->Iex.Binop.op == Iop_CmpEQ16
965 || e->Iex.Binop.op == Iop_CmpNE32
966 || e->Iex.Binop.op == Iop_CmpNE64
967 || e->Iex.Binop.op == Iop_CmpLT32S
968 || e->Iex.Binop.op == Iop_CmpLT32U
969 || e->Iex.Binop.op == Iop_CmpLT64U
970 || e->Iex.Binop.op == Iop_CmpLE32U
971 || e->Iex.Binop.op == Iop_CmpLE32S
972 || e->Iex.Binop.op == Iop_CmpLE64S
973 || e->Iex.Binop.op == Iop_CmpLT64S
974 || e->Iex.Binop.op == Iop_CmpEQ64) {
976 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
977 || e->Iex.Binop.op == Iop_CmpLE32S
978 || e->Iex.Binop.op == Iop_CmpLT64S
979 || e->Iex.Binop.op == Iop_CmpLE64S);
982 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
983 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
987 switch (e->Iex.Binop.op) {
1044 if (e->Iex.Binop.op == Iop_Max32U) {
1047 HReg argL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1048 HReg argR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1050 e->Iex.Binop.arg2);
1062 if (e->Iex.Binop.op == Iop_Mul32 || e->Iex.Binop.op == Iop_Mul64) {
1063 Bool sz32 = (e->Iex.Binop.op == Iop_Mul32);
1065 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1066 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1074 if (e->Iex.Binop.op == Iop_MullU32 || e->Iex.Binop.op == Iop_MullS32) {
1082 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS32);
1083 Bool size = toBool(e->Iex.Binop.op == Iop_MullS32)
1084 || toBool(e->Iex.Binop.op == Iop_MullU32);
1085 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1086 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1108 if (e->Iex.Binop.op == Iop_CmpF64) {
1111 r_srcL = iselFltExpr(env, e->Iex.Binop.arg1);
1112 r_srcR = iselFltExpr(env, e->Iex.Binop.arg2);
1114 r_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1115 r_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1192 if (e->Iex.Binop.op == Iop_DivModU64to32 ||
1193 e->Iex.Binop.op == Iop_DivModS64to32) {
1200 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS64to32);
1202 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1203 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1222 if (e->Iex.Binop.op == Iop_8HLto16
1223 || e->Iex.Binop.op == Iop_16HLto32) {
1224 HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1225 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1231 switch (e->Iex.Binop.op) {
1256 if (e->Iex.Binop.op == Iop_32HLto64) {
1258 HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1259 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1277 if (e->Iex.Binop.op == Iop_F32toI64S) {
1281 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
1284 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
1295 if (e->Iex.Binop.op == Iop_F64toI32S) {
1298 valD = iselFltExpr(env, e->Iex.Binop.arg2);
1300 valD = iselDblExpr(env, e->Iex.Binop.arg2);
1305 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
1319 switch (e->Iex.Binop.op) {
1346 HReg regL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1347 HReg regR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1364 IROp op_unop = e->Iex.Unop.op;
1377 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1431 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
1444 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
1452 HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg);
1464 HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg);
1477 valD = iselFltExpr(env, e->Iex.Binop.arg2);
1479 valD = iselDblExpr(env, e->Iex.Binop.arg2);
1483 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
1498 return iselWordExpr_R(env, e->Iex.Unop.arg);
1502 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1514 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1522 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1537 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1568 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1580 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1586 iselInt64Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
1594 r_dst = iselWordExpr_R(env, e->Iex.Unop.arg);
1598 iselInt64Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
1606 r_dst = iselWordExpr_R(env, e->Iex.Unop.arg);
1612 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1623 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1635 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1644 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1663 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1677 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1688 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1691 iselInt64Expr(&hi, &lo, env, e->Iex.Unop.arg);
1703 tmp1 = iselWordExpr_R(env, e->Iex.Unop.arg);
1717 iselInt128Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
1724 iselInt128Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
1735 switch (e->Iex.Unop.op) {
1757 HReg regL = iselWordExpr_R(env, e->Iex.Unop.arg);
1777 MIPSAMode *am_addr = MIPSAMode_IR(e->Iex.Get.offset,
1790 typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
1791 HReg r_dst = iselWordExpr_R(env, e->Iex.ITE.iffalse);
1792 HReg r1 = iselWordExpr_R(env, e->Iex.ITE.iftrue);
1793 HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
1809 IRConst *con = e->Iex.Const.con;
1835 vassert(ty == e->Iex.CCall.retty);
1840 if (e->Iex.CCall.retty != Ity_I64 && e->Iex.CCall.retty != Ity_I32)
1846 doHelperCall(&addToSp, &rloc, env, NULL/*guard*/, e->Iex.CCall.cee,
1847 e->Iex.CCall.retty, e->Iex.CCall.args );
1909 IRConst *con = e->Iex.Const.con;
1976 && e->Iex.Const.con->tag == Ico_U8
1977 && e->Iex.Const.con->Ico.U8 >= 1 && e->Iex.Const.con->Ico.U8 <= 31) {
1978 return MIPSRH_Imm(False /*unsigned */ , e->Iex.Const.con->Ico.U8);
2015 && e->Iex.Const.con->tag == Ico_U8
2016 && e->Iex.Const.con->Ico.U8 >= 1 && e->Iex.Const.con->Ico.U8 <= 63)
2019 e->Iex.Const.con->Ico.U8);
2045 if (e->Iex.Binop.op == Iop_CmpEQ32
2046 || e->Iex.Binop.op == Iop_CmpNE32
2047 || e->Iex.Binop.op == Iop_CmpNE64
2048 || e->Iex.Binop.op == Iop_CmpLT32S
2049 || e->Iex.Binop.op == Iop_CmpLT32U
2050 || e->Iex.Binop.op == Iop_CmpLT64U
2051 || e->Iex.Binop.op == Iop_CmpLE32S
2052 || e->Iex.Binop.op == Iop_CmpLE64S
2053 || e->Iex.Binop.op == Iop_CmpLT64S
2054 || e->Iex.Binop.op == Iop_CmpEQ64) {
2056 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
2057 || e->Iex.Binop.op == Iop_CmpLE32S
2058 || e->Iex.Binop.op == Iop_CmpLT64S
2059 || e->Iex.Binop.op == Iop_CmpLE64S);
2062 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2063 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
2067 switch (e->Iex.Binop.op) {
2123 if (e->Iex.Binop.op == Iop_Not1) {
2125 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
2185 lookupIRTempPair(rHi, rLo, env, e->Iex.RdTmp.tmp);
2191 switch (e->Iex.Binop.op) {
2197 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS64);
2199 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2200 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2212 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2213 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2217 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2218 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2221 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS64to64);
2235 iselInt128Expr(&rHi1, &rLo1, env, e->Iex.Binop.arg1);
2237 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2240 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS128to64);
2285 lookupIRTemp64(rHi, rLo, env, e->Iex.RdTmp.tmp);
2292 HReg r_addr = iselWordExpr_R(env, e->Iex.Load.addr);
2302 ULong w64 = e->Iex.Const.con->Ico.U64;
2307 vassert(e->Iex.Const.con->tag == Ico_U64);
2329 MIPSAMode *am_addr = MIPSAMode_IR(e->Iex.Get.offset,
2340 vassert(typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1);
2345 HReg cond = iselWordExpr_R(env, e->Iex.ITE.cond);
2349 iselInt64Expr(&expr0Hi, &expr0Lo, env, e->Iex.ITE.iffalse);
2350 iselInt64Expr(&expr1Hi, &expr1Lo, env, e->Iex.ITE.iftrue);
2368 IROp op_binop = e->Iex.Binop.op;
2384 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2385 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2409 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2410 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2431 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2432 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2450 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2452 iselInt64Expr(&r_sHi, &r_sLo, env, e->Iex.Binop.arg1);
2464 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2465 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2477 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2478 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2510 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2511 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2574 iselInt64Expr(&a0, &a1, env, e->Iex.Binop.arg1);
2575 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2642 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2643 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2710 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2711 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2757 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
2763 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
2800 switch (e->Iex.Unop.op) {
2804 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2824 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2838 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2852 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2872 iselInt64Expr(&yHi, &yLo, env, e->Iex.Unop.arg);
2897 iselInt64Expr(&srcHi, &srcLo, env, e->Iex.Unop.arg);
2918 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
2947 ppIROp(e->Iex.Unop.op);
2978 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
2982 vassert(e->Iex.Load.ty == Ity_F32
2983 || (e->Iex.Load.ty == Ity_F64 && fp_mode64));
2985 MIPSAMode *am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, ty);
2986 if (e->Iex.Load.ty == Ity_F64) {
2997 MIPSAMode *am_addr = MIPSAMode_IR(e->Iex.Get.offset,
3000 if (e->Iex.Load.ty == Ity_F64) {
3011 switch (e->Iex.Unop.op) {
3013 HReg fr_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3024 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3033 HReg fr_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3041 iselInt64Expr(&Hi, &Lo, env, e->Iex.Unop.arg);
3050 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3063 Bool sz32 = e->Iex.Unop.op == Iop_AbsF32;
3064 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3071 Bool sz32 = e->Iex.Unop.op == Iop_NegF32;
3072 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3079 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3086 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3093 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3100 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3112 switch (e->Iex.Triop.details->op) {
3122 HReg argL = iselFltExpr(env, e->Iex.Triop.details->arg2);
3123 HReg argR = iselFltExpr(env, e->Iex.Triop.details->arg3);
3125 switch (e->Iex.Triop.details->op) {
3157 set_MIPS_rounding_mode(env, e->Iex.Triop.details->arg1);
3168 switch (e->Iex.Binop.op) {
3172 valD = iselFltExpr(env, e->Iex.Binop.arg2);
3174 valD = iselDblExpr(env, e->Iex.Binop.arg2);
3177 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3185 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
3187 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3195 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
3197 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3205 HReg fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3212 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3225 fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3241 iselInt64Expr(&Hi, &Lo, env, e->Iex.Binop.arg2);
3245 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3258 fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3274 iselInt64Expr(&Hi, &Lo, env, e->Iex.Binop.arg2);
3278 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3287 Bool sz32 = e->Iex.Binop.op == Iop_SqrtF32;
3288 HReg src = iselFltExpr(env, e->Iex.Binop.arg2);
3290 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3303 switch (e->Iex.Qop.details->op) {
3309 switch (e->Iex.Qop.details->op) {
3326 HReg src1 = iselFltExpr(env, e->Iex.Qop.details->arg2);
3327 HReg src2 = iselFltExpr(env, e->Iex.Qop.details->arg3);
3328 HReg src3 = iselFltExpr(env, e->Iex.Qop.details->arg4);
3329 set_MIPS_rounding_mode(env, e->Iex.Qop.details->arg1);
3341 if (e->tag == Iex_Unop && e->Iex.Unop.op == Iop_TruncF64asF32) {
3370 HReg fsrc = iselDblExpr(env, e->Iex.Unop.arg);
3386 && typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
3388 HReg r0 = iselFltExpr(env, e->Iex.ITE.iffalse);
3389 HReg r1 = iselFltExpr(env, e->Iex.ITE.iftrue);
3390 HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
3420 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3427 vassert(e->Iex.Load.ty == Ity_F64);
3428 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, ty);
3437 MIPSAMode *am_addr = MIPSAMode_IR(e->Iex.Get.offset,
3445 switch (e->Iex.Unop.op) {
3454 HReg src = iselFltExpr(env, e->Iex.Unop.arg);
3464 iselInt64Expr(&Hi, &Lo, env, e->Iex.Unop.arg);
3473 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3489 HReg src = iselDblExpr(env, e->Iex.Unop.arg);
3497 switch (e->Iex.Binop.op) {
3499 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3502 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3510 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3512 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3525 switch (e->Iex.Triop.details->op) {
3532 HReg argL = iselDblExpr(env, e->Iex.Triop.details->arg2);
3533 HReg argR = iselDblExpr(env, e->Iex.Triop.details->arg3);
3535 switch (e->Iex.Triop.details->op) {
3554 set_MIPS_rounding_mode(env, e->Iex.Triop.details->arg1);
3565 switch (e->Iex.Qop.details->op) {
3571 switch (e->Iex.Qop.details->op) {
3588 HReg src1 = iselDblExpr(env, e->Iex.Qop.details->arg2);
3589 HReg src2 = iselDblExpr(env, e->Iex.Qop.details->arg3);
3590 HReg src3 = iselDblExpr(env, e->Iex.Qop.details->arg4);
3591 set_MIPS_rounding_mode(env, e->Iex.Qop.details->arg1);
3606 && typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
3607 HReg r0 = iselDblExpr(env, e->Iex.ITE.iffalse);
3608 HReg r1 = iselDblExpr(env, e->Iex.ITE.iftrue);
3609 HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
4046 IRConst* cdst = next->Iex.Const.con;
