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Lines Matching refs:n3

328 void log_3Ir(InstrInfo* n, InstrInfo* n2, InstrInfo* n3)
332    n3->parent->Ir.a++;
373 void log_3IrNoX_0D_cache_access(InstrInfo* n, InstrInfo* n2, InstrInfo* n3)
380    //            n3, n3->instr_addr, n3->instr_len);
387    cachesim_I1_doref_NoX(n3->instr_addr, n3->instr_len,
388 			 &n3->parent->Ir.m1, &n3->parent->Ir.mL);
389    n3->parent->Ir.a++;