Home | History | Annotate | Download | only in a64

Lines Matching refs:shift_amount

197     VIXL_ASSERT(operand.shift_amount() <= 4);
204                     operand.shift_amount());
221   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
225     EmitShift(rd, operand.reg(), operand.shift(), operand.shift_amount());
230                     operand.shift_amount());
262                     operand.shift_amount());
418   if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) ||
459   } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) {
686   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
691                     operand.shift_amount()));
694     EmitShift(temp, operand.reg(), operand.shift(), operand.shift_amount());
701     VIXL_ASSERT(operand.shift_amount() <= 4);
707                     operand.shift_amount());