Lines Matching refs:tVal6
69 tVal6 RN 6
172 UXTB16 tVal6, Above0123, ROR #8 ;// pSrcAbove[1, 3]
173 UADD16 tVal11, tVal6, tVal7 ;// pSrcAbove[0, 2] + pSrcAbove[1, 3]
180 ADD tVal6, Left0, Left1 ;// tVal6 = Left0 + Left1
182 ADD tVal6, tVal6, tVal7 ;// tVal6 = tVal6 + tVal7
183 ADD Out0, tVal6, tVal11 ;// Out0 = tVal6 + tVal11
211 UXTB16 tVal6, Above0123, ROR #8 ;// pSrcAbove[1, 3]
212 UADD16 Out0, tVal6, tVal7 ;// pSrcAbove[0, 2] + pSrcAbove[1, 3]
232 M_STR Out0, [pDst], dstStep ;// store {tVal6} at pDst [0 to 3 ]
233 M_STR Out0, [pDst], dstStep ;// store {tVal6} at pDst [4 to 7 ]
234 M_STR Out0, [pDst], dstStep ;// store {tVal6} at pDst [8 to 11]
235 STR Out0, [pDst] ;// store {tVal6} at pDst [12 to 15]
314 UHADD8 tVal6, Above0123, tVal9 ;// {xx, d2, xx, xx }
316 UHSUB8 tVal6, tVal6, tVal10 ;// {xx, e2, xx, xx }
318 UADD8 tVal6, tVal6, r0x80808080 ;// {xx, f2, xx, xx }
322 PKHBT tVal6, tVal8, tVal6 ;// {xx, f2, f1, f0 }
323 BIC tVal6, tVal6, #0xFF000000 ;// {00, f2, f1, f0 }
324 ORR Out0, tVal6, tVal11 ;// {U3, f2, f1, f0 }
349 UHADD8 tVal6, Above0123, tVal9 ;// {d3, d2, d1, d0 }
352 UHSUB8 tVal6, tVal6, tVal10 ;// {e3, e2, e1, e0 }
355 UADD8 Out0, tVal6, r0x80808080 ;// {f3, f2, f1, f0 }
437 MOV tVal6, Out0, LSL #8 ;// tVal6 = e1 e0 eL 00
443 ORR Out2, tVal6, tVal4 ;// Out2 = e1 e0 eL l1
482 UHADD8 tVal6, tVal11, tVal10 ;// tVal11= 00 j2 00 j3
487 UHSUB8 tVal11, tVal6, tVal14 ;// tVal11= 00 k2 00 k3
548 ORR tVal6, Left0, Left1, LSL #16 ;// tVal6 = 00 L1 00 L0
554 UHADD8 tVal4, tVal6, tVal11 ;// tVal4 = 00 g3 00 g2
557 UHSUB8 tVal6, tVal6, tVal8 ;// tVal6 = 00 d2 00 d1
562 UADD8 tVal8, tVal6, r0x80808080 ;// tVal8 = 00 e2 00 e1
