/external/llvm/lib/Target/MSP430/ |
MSP430FrameLowering.cpp | 238 uint64_t Amount = Old->getOperand(0).getImm(); 239 if (Amount != 0) { 241 // amount of space needed for the outgoing arguments up to the next 243 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign; 249 .addReg(MSP430::SPW).addImm(Amount); 252 // factor out the amount the callee already popped. 254 Amount -= CalleeAmt; 255 if (Amount) 258 .addReg(MSP430::SPW).addImm(Amount); [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16FrameLowering.cpp | 151 int64_t Amount = I->getOperand(0).getImm(); 154 Amount = -Amount; 159 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
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MipsSEFrameLowering.cpp | 499 int64_t Amount = I->getOperand(0).getImm(); 502 Amount = -Amount; 505 TII.adjustStackPtr(SP, Amount, MBB, I);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
radeon_emulate_loops.c | 53 float Amount; 119 float amount; local 156 amount = rc_get_constant_value(count_inst->C, 167 count_inst->Amount += amount; 174 count_inst->Amount -= amount; 232 count_inst.Amount = 0.0f; 272 if(count_inst.Amount == 0.0f){ 275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount); [all...] |
/external/llvm/lib/Target/ARM/ |
Thumb1FrameLowering.cpp | 60 // ADJCALLSTACKDOWN -> sub, sp, sp, amount 61 // ADJCALLSTACKUP -> add, sp, sp, amount 64 unsigned Amount = Old->getOperand(0).getImm(); 65 if (Amount != 0) { 67 // amount of space needed for the outgoing arguments up to the next 70 Amount = (Amount+Align-1)/Align*Align; 75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount); 78 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
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ARMFrameLowering.cpp | [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_emulate_loops.c | 53 float Amount; 119 float amount; local 156 amount = rc_get_constant_value(count_inst->C, 167 count_inst->Amount += amount; 174 count_inst->Amount -= amount; 232 count_inst.Amount = 0.0f; 272 if(count_inst.Amount == 0.0f){ 275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.cpp | 487 uint64_t Amount = Old->getOperand(0).getImm(); 488 if (Amount != 0) { 490 // amount of space needed for the outgoing arguments up to the next 493 Amount = (Amount+Align-1)/Align*Align; 495 assert(Amount%4 == 0); 496 Amount /= 4; 498 bool isU6 = isImmU6(Amount); 499 if (!isU6 && !isImmU16(Amount)) { 503 << Amount << "\n" [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FrameLowering.cpp | 122 int64_t Amount = I->getOperand(0).getImm(); 123 Amount = RoundUpToAlignment(Amount, Align); 125 Amount = -Amount; 141 assert(Amount > -0xffffff && Amount < 0xffffff && "call frame too large"); 142 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, Amount, TII); 172 // Calculate amount of bytes used for return address storing. 458 // ... otherwise the amount to pop is *all* of the argument space [all...] |
/external/llvm/include/llvm/Analysis/ |
BlockFrequencyInfoImpl.h | 327 /// In addition to the raw weight amount, Weight stores the type of the edge 335 uint64_t Amount; 336 Weight() : Type(Local), Amount(0) {} 354 void addLocal(const BlockNode &Node, uint64_t Amount) { 355 add(Node, Amount, Weight::Local); 357 void addExit(const BlockNode &Node, uint64_t Amount) { 358 add(Node, Amount, Weight::Exit); 360 void addBackedge(const BlockNode &Node, uint64_t Amount) { 361 add(Node, Amount, Weight::Backedge); 376 void add(const BlockNode &Node, uint64_t Amount, Weight::DistType Type) [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 227 unsigned Amount; 398 return ShiftExtend.Amount; [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
iads.h | 697 DWORD Amount; [all...] |
/prebuilts/misc/common/icu4j/ |
icu4j.jar | |