| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 429 SmallVector<CCValAssign, 16> ArgLocs;
431 getTargetMachine(), ArgLocs, *DAG.getContext(),
447 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i){
448 CCValAssign &VA = ArgLocs[i];
472 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
473 CCValAssign &VA = ArgLocs[i];
845 SmallVector<CCValAssign, 16> ArgLocs;
847 getTargetMachine(), ArgLocs, *DAG.getContext());
860 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
861 CCValAssign &VA = ArgLocs[i]
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 282 SmallVectorImpl<CCValAssign> &ArgLocs,
336 SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal;
439 SmallVector<CCValAssign, 16> ArgLocs;
441 getTargetMachine(), ArgLocs, *DAG.getContext());
442 AnalyzeArguments(CCInfo, ArgLocs, Ins);
450 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
451 CCValAssign &VA = ArgLocs[i];
585 SmallVector<CCValAssign, 16> ArgLocs;
587 getTargetMachine(), ArgLocs, *DAG.getContext());
588 AnalyzeArguments(CCInfo, ArgLocs, Outs)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | [all...] |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | [all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | [all...] |
| SIISelLowering.cpp | 364 SmallVector<CCValAssign, 16> ArgLocs;
366 getTargetMachine(), ArgLocs, *DAG.getContext());
397 CCValAssign &VA = ArgLocs[ArgIdx++];
438 Reg = ArgLocs[ArgIdx++].getLocReg();
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/clang/lib/Sema/ |
| SemaTemplateInstantiateDecl.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 351 SmallVector<CCValAssign, 16> ArgLocs;
353 getTargetMachine(), ArgLocs, *DAG.getContext());
359 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) {
360 CCValAssign &VA = ArgLocs[i];
383 CCValAssign &NextVA = ArgLocs[++i];
551 SmallVector<CCValAssign, 16> ArgLocs;
553 getTargetMachine(), ArgLocs, *DAG.getContext());
559 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
560 CCValAssign &VA = ArgLocs[i];
700 SmallVector<CCValAssign, 16> ArgLocs;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 680 SmallVector<CCValAssign, 16> ArgLocs;
681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs,
687 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
689 CCValAssign &VA = ArgLocs[I];
786 SmallVectorImpl<CCValAssign> &ArgLocs) {
789 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
790 CCValAssign &VA = ArgLocs[I];
819 SmallVector<CCValAssign, 16> ArgLocs;
820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs,
826 if (IsTailCall && !canUseSiblingCall(ArgCCInfo, ArgLocs))
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
