| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI =
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
|
| R600ISelLowering.cpp | 64 MachineInstr *NewMI =
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI =
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI =
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI =
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI =
226 TII->addFlag(NewMI, 1, MO_FLAG_PUSH)
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 277 MCInst NewMI;
279 NewMI.setOpcode(Opcode);
282 NewMI.addOperand(MI->getOperand(0));
285 NewMI.addOperand(NewReg);
287 // Copy the rest operands into NewMI.
289 NewMI.addOperand(MI->getOperand(i));
290 printInstruction(&NewMI, O);
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI =
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
|
| R600ISelLowering.cpp | 64 MachineInstr *NewMI =
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI =
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI =
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI =
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI =
226 TII->addFlag(NewMI, 1, MO_FLAG_PUSH)
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ExpandSpecialInstrs.cpp | 36 void SetFlagInNewMI(MachineInstr *NewMI, const MachineInstr *OldMI,
58 void R600ExpandSpecialInstrsPass::SetFlagInNewMI(MachineInstr *NewMI,
63 TII->setImmOperand(NewMI, Op, Val);
326 MachineInstr *NewMI =
330 NewMI->bundleWithPred();
332 TII->addFlag(NewMI, 0, MO_FLAG_MASK);
335 TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST);
337 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::clamp);
338 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::literal);
339 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src0_abs)
[all...] |
| R600InstrInfo.cpp | 76 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
78 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0))
[all...] |
| AMDILCFGStructurizer.cpp | 506 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
507 MBB->insert(I, NewMI);
508 MachineInstrBuilder MIB(*MF, NewMI);
510 SHOWNEWINSTR(NewMI);
[all...] |
| R600ISelLowering.cpp | 201 MachineInstrBuilder NewMI;
205 NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
208 NewMI.addOperand(MI->getOperand(i));
215 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
219 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
224 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
228 TII->addFlag(NewMI, 0, MO_FLAG_ABS);
233 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
237 TII->addFlag(NewMI, 0, MO_FLAG_NEG);
259 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 598 MachineInstr *NewMI;
609 NewMI = BuildMI(*MBB, jmpPos, dl,
620 NewMI = BuildMI(*MBB, jmpPos, dl,
626 NewMI = BuildMI(*MBB, jmpPos, dl,
632 assert(NewMI && "New Value Jump Instruction Not created!");
633 (void)NewMI;
|
| HexagonVLIWPacketizer.cpp | 775 MachineInstr *NewMI =
777 bool ResourcesAvailable = ResourceTracker->canReserveResources(NewMI);
778 MI->getParent()->getParent()->DeleteMachineInstr(NewMI);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 102 MachineInstr *NewMI;
108 NewMI = BuildMI(*MF, MI->getDebugLoc(),
117 MFI->insert(MBBI, NewMI); // Insert the new inst
118 return NewMI;
252 MachineInstr *NewMI = postRAConvertToLEA(MFI, MBI);
253 if (NewMI) {
257 DEBUG(dbgs() << "FixLEA: Replaced by: "; NewMI->dump(););
260 static_cast<MachineBasicBlock::iterator>(NewMI);
303 MachineInstr *NewMI = nullptr;
309 NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addrr_opcode)
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineCSE.cpp | 470 MachineInstr *NewMI = TII->commuteInstruction(MI);
471 if (NewMI) {
473 FoundCSE = VNT.count(NewMI);
474 if (NewMI != MI) {
476 NewMI->eraseFromParent();
|
| TailDuplication.cpp | 432 MachineInstr *NewMI = TII->duplicate(MI, MF);
433 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
434 MachineOperand &MO = NewMI->getOperand(i);
455 PredBB->insert(PredBB->instr_end(), NewMI);
[all...] |
| TargetInstrInfo.cpp | 122 bool NewMI) const {
158 if (NewMI) {
407 MachineInstr *NewMI =
409 MachineInstrBuilder MIB(MF, NewMI);
435 return NewMI;
459 MachineInstr *NewMI = nullptr;
464 NewMI = foldPatchpoint(MF, MI, Ops, FI, *this);
467 NewMI =foldMemoryOperandImpl(MF, MI, Ops, FI);
470 if (NewMI) {
471 NewMI->setMemRefs(MI->memoperands_begin(), MI->memoperands_end())
[all...] |
| TwoAddressInstructionPass.cpp | 578 MachineInstr *NewMI = TII->commuteInstruction(MI);
580 if (NewMI == nullptr) {
585 DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI);
586 assert(NewMI == MI &&
626 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV);
628 if (!NewMI)
632 DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
636 LIS->ReplaceMachineInstrInMaps(mi, NewMI);
638 if (NewMI->findRegisterUseOperand(RegB, false, TRI))
642 Sunk = sink3AddrInstruction(NewMI, RegB, mi)
[all...] |
| RegisterCoalescer.cpp | 642 MachineInstr *NewMI = TII->commuteInstruction(DefMI);
643 if (!NewMI)
649 if (NewMI != DefMI) {
650 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
652 MBB->insert(Pos, NewMI);
655 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
656 NewMI->getOperand(OpIdx).setIsKill();
804 MachineInstr *NewMI = std::prev(MII);
806 LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI);
810 // NewMI may have dead implicit defs (E.g. EFLAGS for MOV<bits>r0 on X86)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 381 MachineInstr *NewMI = MRI->getVRegDef(Reg);
382 if (!NewMI)
384 Front.push_back(NewMI);
389 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
390 if (!NewMI)
392 Front.push_back(NewMI);
|
| ARMFrameLowering.cpp | 692 MachineInstr *NewMI = std::prev(MBBI);
694 NewMI->addOperand(MBBI->getOperand(i));
698 MBBI = NewMI;
[all...] |
| ARMBaseInstrInfo.cpp | 249 MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
251 LV->addVirtualRegisterDead(Reg, NewMI);
256 MachineInstr *NewMI = NewMIs[j];
257 if (!NewMI->readsRegister(Reg))
259 LV->addVirtualRegisterKilled(Reg, NewMI);
261 VI.Kills.push_back(NewMI);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 518 MachineInstr *NewMI =
525 EntryMBB->insertAfter(Pos, NewMI);
[all...] |
| /external/clang/lib/Serialization/ |
| ASTReader.cpp | [all...] |
