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Searched
defs:OpSize
(Results
1 - 8
of
8
) sorted by null
/external/llvm/utils/TableGen/
X86RecognizableInstr.h
51
/// The
OpSize
field from the record
52
uint8_t
OpSize
;
118
/// @param
OpSize
Indicates the operand size of the instruction.
119
/// If register size does not match
OpSize
, then
123
bool hasREX_WPrefix, uint8_t
OpSize
);
130
/// @param
OpSize
- Indicates whether this is an OpSize16 instruction.
134
uint8_t
OpSize
);
139
uint8_t
OpSize
);
144
uint8_t
OpSize
);
146
uint8_t
OpSize
);
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all
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/external/llvm/lib/Analysis/
TargetTransformInfo.cpp
291
unsigned
OpSize
= OpTy->getScalarSizeInBits();
292
if (DL->isLegalInteger(
OpSize
) &&
293
OpSize
<= DL->getPointerTypeSizeInBits(Ty))
ConstantFolding.cpp
656
unsigned
OpSize
= DL->getTypeSizeInBits(Op0->getType());
661
return ConstantInt::get(Op0->getType(), Offs1.zextOrTrunc(
OpSize
) -
662
Offs2.zextOrTrunc(
OpSize
));
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/external/llvm/lib/Target/X86/MCTargetDesc/
X86MCCodeEmitter.cpp
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/art/compiler/dex/
compiler_enums.h
126
// It is encoded as
OpSize
<< 16 | (number of bits in vector)
262
enum
OpSize
{
275
std::ostream& operator<<(std::ostream& os, const
OpSize
& kind);
/external/llvm/lib/Target/X86/
X86ISelLowering.cpp
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/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp
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...]
/external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp
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