| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 272 EVT SVT = VT;
273 while (SVT != MVT::f32) {
274 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
275 if (ConstantFPSDNode::isValueValidForType(SVT, CFP->getValueAPF()) &&
278 TLI.isLoadExtLegal(ISD::EXTLOAD, SVT) &&
280 Type *SType = SVT.getTypeForEVT(*DAG.getContext());
282 VT = SVT;
[all...] |
| LegalizeFloatTypes.cpp | 582 EVT SVT = N->getOperand(0).getValueType();
595 if (NVT.bitsGE(SVT))
658 EVT SVT = N->getOperand(0).getValueType();
661 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, RVT);
[all...] |
| LegalizeIntegerTypes.cpp | 201 EVT SVT = getSetCCResultType(N->getOperand(2).getValueType());
206 if (!TLI.isTypeLegal(SVT))
207 SVT = NVT;
209 SDVTList VTs = DAG.getVTList(N->getValueType(0), SVT, MVT::Other);
539 EVT SVT = getSetCCResultType(N->getOperand(0).getValueType());
545 if (!TLI.isTypeLegal(SVT))
546 SVT = NVT;
549 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
564 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, LHS, RHS,
567 assert(NVT.bitsLE(SVT) && "Integer type overpromoted?")
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 333 MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy;
345 switch (SVT) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
