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    Searched defs:i830 (Results 1 - 11 of 11) sorted by null

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/
i830_context.c	57 struct i830_context *i830 = rzalloc(NULL, struct i830_context); local 58 struct intel_context *intel = &i830->intel; 60 if (!i830) 63 i830InitVtbl(i830); 68 FREE(i830); 109 i830InitState(i830);
i830_texstate.c	120 struct i830_context *i830 = i830_context(ctx); local 126 GLuint *state = i830->state.Tex[unit], format, pitch; 135 if (i830->state.tex_buffer[unit] != NULL) { 136 drm_intel_bo_unreference(i830->state.tex_buffer[unit]); 137 i830->state.tex_buffer[unit] = NULL; 152 i830->state.tex_buffer[unit] = intelObj->mt->region->bo; 158 i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch; 288 /* 3D textures not available on i830 315 I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), true); 319 I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit)) 329 struct i830_context *i830 = i830_context(&intel->ctx); local 344 struct i830_context *i830 = i830_context(&intel->ctx); local     [all...]
i830_vtbl.c	80 struct i830_context *i830 = i830_context(ctx); local 134 GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & 163 if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) { 164 I830_STATECHANGE(i830, I830_UPLOAD_TEX(i)); 165 i830->state.Tex[i][I830_TEXREG_MCS] = mcs; 178 if (v0 != i830->state.Ctx[I830_CTXREG_VF] || 179 v2 != i830->state.Ctx[I830_CTXREG_VF2] || 180 mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] || 181 index_bitset != i830->last_index_bitset) { 184 I830_STATECHANGE(i830, I830_UPLOAD_CTX) 210 struct i830_context *i830 = i830_context(&intel->ctx); local 242 struct i830_context *i830 = i830_context(&intel->ctx); local 419 struct i830_context *i830 = i830_context(&intel->ctx); local 571 struct i830_context *i830 = i830_context(&intel->ctx); local 616 struct i830_context *i830 = i830_context(&intel->ctx); local 859 struct i830_context *i830 = i830_context(&intel->ctx); local 866 struct i830_context *i830 = i830_context(&intel->ctx); local     [all...]
i830_state.c	54 struct i830_context *i830 = i830_context(ctx); local 63 I830_STATECHANGE(i830, I830_UPLOAD_CTX); 64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK; 65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK | 67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK | 69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE | 78 struct i830_context *i830 = i830_context(ctx); local 84 I830_STATECHANGE(i830, I830_UPLOAD_CTX); 85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK; 86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK 94 struct i830_context *i830 = i830_context(ctx); local 205 struct i830_context *i830 = i830_context(ctx); local 234 struct i830_context *i830 = i830_context(ctx); local 261 struct i830_context *i830 = i830_context(ctx); local 285 struct i830_context *i830 = i830_context(ctx); local 423 struct i830_context *i830 = i830_context(ctx); local 437 struct i830_context *i830 = i830_context(ctx); local 479 struct i830_context *i830 = i830_context(ctx); local 541 struct i830_context *i830 = i830_context(ctx); local 581 struct i830_context *i830 = i830_context(ctx); local 596 struct i830_context *i830 = i830_context(ctx); local 624 struct i830_context *i830 = i830_context(ctx); local 645 struct i830_context *i830 = i830_context(ctx); local 666 struct i830_context *i830 = i830_context(ctx); local 687 struct i830_context *i830 = i830_context(ctx); local 713 struct i830_context *i830 = i830_context(ctx); local 742 struct i830_context *i830 = i830_context(ctx); local 763 struct i830_context *i830 = i830_context(ctx); local 1085 struct i830_context *i830 = i830_context(ctx); local     [all...]
intel_tris.c	284 struct i830_context *i830 = i830_context(&intel->ctx); local 300 OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >> 302 (i830->state.Ctx[I830_CTXREG_VF2] << 16) |     [all...]
/external/mesa3d/src/mesa/drivers/dri/i915/
i830_context.c	57 struct i830_context *i830 = rzalloc(NULL, struct i830_context); local 58 struct intel_context *intel = &i830->intel; 60 if (!i830) 63 i830InitVtbl(i830); 68 FREE(i830); 109 i830InitState(i830);
i830_texstate.c	120 struct i830_context *i830 = i830_context(ctx); local 126 GLuint *state = i830->state.Tex[unit], format, pitch; 135 if (i830->state.tex_buffer[unit] != NULL) { 136 drm_intel_bo_unreference(i830->state.tex_buffer[unit]); 137 i830->state.tex_buffer[unit] = NULL; 152 i830->state.tex_buffer[unit] = intelObj->mt->region->bo; 158 i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch; 288 /* 3D textures not available on i830 315 I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), true); 319 I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit)) 329 struct i830_context *i830 = i830_context(&intel->ctx); local 344 struct i830_context *i830 = i830_context(&intel->ctx); local     [all...]
i830_vtbl.c	80 struct i830_context *i830 = i830_context(ctx); local 134 GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & 163 if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) { 164 I830_STATECHANGE(i830, I830_UPLOAD_TEX(i)); 165 i830->state.Tex[i][I830_TEXREG_MCS] = mcs; 178 if (v0 != i830->state.Ctx[I830_CTXREG_VF] || 179 v2 != i830->state.Ctx[I830_CTXREG_VF2] || 180 mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] || 181 index_bitset != i830->last_index_bitset) { 184 I830_STATECHANGE(i830, I830_UPLOAD_CTX) 210 struct i830_context *i830 = i830_context(&intel->ctx); local 242 struct i830_context *i830 = i830_context(&intel->ctx); local 419 struct i830_context *i830 = i830_context(&intel->ctx); local 571 struct i830_context *i830 = i830_context(&intel->ctx); local 616 struct i830_context *i830 = i830_context(&intel->ctx); local 859 struct i830_context *i830 = i830_context(&intel->ctx); local 866 struct i830_context *i830 = i830_context(&intel->ctx); local     [all...]
i830_state.c	54 struct i830_context *i830 = i830_context(ctx); local 63 I830_STATECHANGE(i830, I830_UPLOAD_CTX); 64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK; 65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK | 67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK | 69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE | 78 struct i830_context *i830 = i830_context(ctx); local 84 I830_STATECHANGE(i830, I830_UPLOAD_CTX); 85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK; 86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK 94 struct i830_context *i830 = i830_context(ctx); local 205 struct i830_context *i830 = i830_context(ctx); local 234 struct i830_context *i830 = i830_context(ctx); local 261 struct i830_context *i830 = i830_context(ctx); local 285 struct i830_context *i830 = i830_context(ctx); local 423 struct i830_context *i830 = i830_context(ctx); local 437 struct i830_context *i830 = i830_context(ctx); local 479 struct i830_context *i830 = i830_context(ctx); local 541 struct i830_context *i830 = i830_context(ctx); local 581 struct i830_context *i830 = i830_context(ctx); local 596 struct i830_context *i830 = i830_context(ctx); local 624 struct i830_context *i830 = i830_context(ctx); local 645 struct i830_context *i830 = i830_context(ctx); local 666 struct i830_context *i830 = i830_context(ctx); local 687 struct i830_context *i830 = i830_context(ctx); local 713 struct i830_context *i830 = i830_context(ctx); local 742 struct i830_context *i830 = i830_context(ctx); local 763 struct i830_context *i830 = i830_context(ctx); local 1085 struct i830_context *i830 = i830_context(ctx); local     [all...]
intel_tris.c	284 struct i830_context *i830 = i830_context(&intel->ctx); local 300 OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >> 302 (i830->state.Ctx[I830_CTXREG_VF2] << 16) |     [all...]
/art/test/083-compiler-regressions/src/
Main.java	2977 int i830 = 830; local     [all...]

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