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    Searched defs:r_base (Results 1 - 9 of 9) sorted by null

  /art/compiler/dex/quick/arm/
call_arm.cc 35 * adr r_base, <table>
39 * ldmia r_base!, {r_key, r_disp}
62 RegStorage r_base = AllocTemp(); local
73 NewLIR3(kThumb2Adr, r_base.GetReg(), 0, WrapPointer(tab_rec));
80 NewLIR2(kThumb2LdmiaWB, r_base.GetReg(), (1 << r_key.GetRegNum()) | (1 << r_disp.GetRegNum()));
  /art/compiler/dex/quick/arm64/
call_arm64.cc 32 * adr r_base, <table>
37 * ldp r_key, r_disp, [r_base], #8
41 * adr r_base, #0 ; This is the instruction from which we compute displacements
42 * add r_base, r_disp
43 * br r_base
62 RegStorage r_base = AllocTempWide(); local
67 NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, WrapPointer(tab_rec));
77 NewLIR4(kA64LdpPost4rrXD, r_key.GetReg(), r_disp.GetReg(), r_base.GetReg(), 2);
85 LIR* switch_label = NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, -1);
89 OpRegRegRegExtend(kOpAdd, r_base, r_base, As64BitReg(r_disp), kA64Sxtw, 0U)
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  /art/compiler/dex/quick/mips/
call_mips.cc 50 * addiu r_base, rRA, <table> - <BaseLabel> ; table relative to BaseLabel
51 addu r_end, r_end, r_base ; end of table
54 * beq r_base, r_end, done
55 * lw r_key, 0(r_base)
56 * addu r_base, 8
58 * lw r_disp, -4(r_base)
104 RegStorage r_base = AllocTemp(); local
105 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec));
106 OpRegRegReg(kOpAdd, r_end, r_end, r_base);
114 LIR* exit_branch = OpCmpBranch(kCondEq, r_base, r_end, NULL)
197 RegStorage r_base = AllocTemp(); local
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  /art/compiler/dex/quick/
gen_common.cc 510 RegStorage r_base) :
512 storage_index_(storage_index), r_base_(r_base) {
519 // Copy helper's result into r_base, a no-op on all but MIPS.
538 RegStorage r_base; local
542 r_base = AllocTempRef();
543 LoadRefDisp(rl_method.reg, mirror::ArtMethod::DeclaringClassOffset().Int32Value(), r_base,
559 r_base = TargetReg(kArg0, kRef);
560 LockTemp(r_base);
561 LoadRefDisp(r_method, mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), r_base,
564 LoadRefDisp(r_base, offset_of_field, r_base, kNotVolatile)
627 RegStorage r_base; local
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  /art/compiler/dex/quick/x86/
int_x86.cc 905 void X86Mir2Lir::OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset)
1611 int r_base = rs_rX86_SP.GetReg(); local
1646 int r_base = rs_rX86_SP.GetReg(); local
2483 int r_base = rs_rX86_SP.GetReg(); local
2514 int r_base = rs_rX86_SP.GetReg(); local
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target_x86.cc 916 int r_base = rs_rX86_SP.GetReg(); local
920 LIR * store = NewLIR3(kX86Mov32MI, r_base, displacement + LOWORD_OFFSET, val_lo);
923 store = NewLIR3(kX86Mov32MI, r_base, displacement + HIWORD_OFFSET, val_hi);
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  /external/valgrind/main/VEX/priv/
host_mips_isel.c 733 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
735 return MIPSAMode_RR(r_idx, r_base);
752 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
755 return MIPSAMode_RR(r_idx, r_base);
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host_ppc_isel.c 2480 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
2503 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
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host_ppc_defs.c 4735 UInt opc2, v_reg, r_idx, r_base; local
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