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      1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines the TargetMachine and LLVMTargetMachine classes.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_TARGET_TARGETMACHINE_H
     15 #define LLVM_TARGET_TARGETMACHINE_H
     16 
     17 #include "llvm/ADT/StringRef.h"
     18 #include "llvm/Pass.h"
     19 #include "llvm/Support/CodeGen.h"
     20 #include "llvm/Target/TargetOptions.h"
     21 #include <cassert>
     22 #include <string>
     23 
     24 namespace llvm {
     25 
     26 class InstrItineraryData;
     27 class JITCodeEmitter;
     28 class GlobalValue;
     29 class Mangler;
     30 class MCAsmInfo;
     31 class MCCodeGenInfo;
     32 class MCContext;
     33 class MCSymbol;
     34 class Target;
     35 class DataLayout;
     36 class TargetLibraryInfo;
     37 class TargetFrameLowering;
     38 class TargetInstrInfo;
     39 class TargetIntrinsicInfo;
     40 class TargetJITInfo;
     41 class TargetLowering;
     42 class TargetPassConfig;
     43 class TargetRegisterInfo;
     44 class TargetSelectionDAGInfo;
     45 class TargetSubtargetInfo;
     46 class ScalarTargetTransformInfo;
     47 class VectorTargetTransformInfo;
     48 class formatted_raw_ostream;
     49 class raw_ostream;
     50 
     51 // The old pass manager infrastructure is hidden in a legacy namespace now.
     52 namespace legacy {
     53 class PassManagerBase;
     54 }
     55 using legacy::PassManagerBase;
     56 
     57 //===----------------------------------------------------------------------===//
     58 ///
     59 /// TargetMachine - Primary interface to the complete machine description for
     60 /// the target machine.  All target-specific information should be accessible
     61 /// through this interface.
     62 ///
     63 class TargetMachine {
     64   TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
     65   void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
     66 protected: // Can only create subclasses.
     67   TargetMachine(const Target &T, StringRef TargetTriple,
     68                 StringRef CPU, StringRef FS, const TargetOptions &Options);
     69 
     70   /// TheTarget - The Target that this machine was created for.
     71   const Target &TheTarget;
     72 
     73   /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
     74   /// feature strings the TargetMachine instance is created with.
     75   std::string TargetTriple;
     76   std::string TargetCPU;
     77   std::string TargetFS;
     78 
     79   /// CodeGenInfo - Low level target information such as relocation model.
     80   /// Non-const to allow resetting optimization level per-function.
     81   MCCodeGenInfo *CodeGenInfo;
     82 
     83   /// AsmInfo - Contains target specific asm information.
     84   ///
     85   const MCAsmInfo *AsmInfo;
     86 
     87   unsigned RequireStructuredCFG : 1;
     88 
     89 public:
     90   virtual ~TargetMachine();
     91 
     92   const Target &getTarget() const { return TheTarget; }
     93 
     94   const StringRef getTargetTriple() const { return TargetTriple; }
     95   const StringRef getTargetCPU() const { return TargetCPU; }
     96   const StringRef getTargetFeatureString() const { return TargetFS; }
     97 
     98   /// getSubtargetImpl - virtual method implemented by subclasses that returns
     99   /// a reference to that target's TargetSubtargetInfo-derived member variable.
    100   virtual const TargetSubtargetInfo *getSubtargetImpl() const {
    101     return nullptr;
    102   }
    103 
    104   mutable TargetOptions Options;
    105 
    106   /// \brief Reset the target options based on the function's attributes.
    107   void resetTargetOptions(const MachineFunction *MF) const;
    108 
    109   // Interfaces to the major aspects of target machine information:
    110   //
    111   // -- Instruction opcode and operand information
    112   // -- Pipelines and scheduling information
    113   // -- Stack frame information
    114   // -- Selection DAG lowering information
    115   //
    116   // N.B. These objects may change during compilation. It's not safe to cache
    117   // them between functions.
    118   virtual const TargetInstrInfo  *getInstrInfo() const { return nullptr; }
    119   virtual const TargetFrameLowering *getFrameLowering() const {
    120     return nullptr;
    121   }
    122   virtual const TargetLowering *getTargetLowering() const { return nullptr; }
    123   virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
    124     return nullptr;
    125   }
    126   virtual const DataLayout *getDataLayout() const { return nullptr; }
    127 
    128   /// getMCAsmInfo - Return target specific asm information.
    129   ///
    130   const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
    131 
    132   /// getSubtarget - This method returns a pointer to the specified type of
    133   /// TargetSubtargetInfo.  In debug builds, it verifies that the object being
    134   /// returned is of the correct type.
    135   template<typename STC> const STC &getSubtarget() const {
    136     return *static_cast<const STC*>(getSubtargetImpl());
    137   }
    138 
    139   /// getRegisterInfo - If register information is available, return it.  If
    140   /// not, return null.  This is kept separate from RegInfo until RegInfo has
    141   /// details of graph coloring register allocation removed from it.
    142   ///
    143   virtual const TargetRegisterInfo *getRegisterInfo() const { return nullptr; }
    144 
    145   /// getIntrinsicInfo - If intrinsic information is available, return it.  If
    146   /// not, return null.
    147   ///
    148   virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return nullptr;}
    149 
    150   /// getJITInfo - If this target supports a JIT, return information for it,
    151   /// otherwise return null.
    152   ///
    153   virtual TargetJITInfo *getJITInfo() { return nullptr; }
    154 
    155   /// getInstrItineraryData - Returns instruction itinerary data for the target
    156   /// or specific subtarget.
    157   ///
    158   virtual const InstrItineraryData *getInstrItineraryData() const {
    159     return nullptr;
    160   }
    161 
    162   bool requiresStructuredCFG() const { return RequireStructuredCFG; }
    163   void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
    164 
    165   /// getRelocationModel - Returns the code generation relocation model. The
    166   /// choices are static, PIC, and dynamic-no-pic, and target default.
    167   Reloc::Model getRelocationModel() const;
    168 
    169   /// getCodeModel - Returns the code model. The choices are small, kernel,
    170   /// medium, large, and target default.
    171   CodeModel::Model getCodeModel() const;
    172 
    173   /// getTLSModel - Returns the TLS model which should be used for the given
    174   /// global variable.
    175   TLSModel::Model getTLSModel(const GlobalValue *GV) const;
    176 
    177   /// getOptLevel - Returns the optimization level: None, Less,
    178   /// Default, or Aggressive.
    179   CodeGenOpt::Level getOptLevel() const;
    180 
    181   /// \brief Overrides the optimization level.
    182   void setOptLevel(CodeGenOpt::Level Level) const;
    183 
    184   void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
    185 
    186   bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
    187 
    188   /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
    189   ///
    190   bool getAsmVerbosityDefault() const ;
    191 
    192   /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
    193   /// is false.
    194   void setAsmVerbosityDefault(bool);
    195 
    196   /// getDataSections - Return true if data objects should be emitted into their
    197   /// own section, corresponds to -fdata-sections.
    198   bool getDataSections() const;
    199 
    200   /// getFunctionSections - Return true if functions should be emitted into
    201   /// their own section, corresponding to -ffunction-sections.
    202   bool getFunctionSections() const;
    203 
    204   /// setDataSections - Set if the data are emit into separate sections.
    205   void setDataSections(bool);
    206 
    207   /// setFunctionSections - Set if the functions are emit into separate
    208   /// sections.
    209   void setFunctionSections(bool);
    210 
    211   /// \brief Register analysis passes for this target with a pass manager.
    212   virtual void addAnalysisPasses(PassManagerBase &) {}
    213 
    214   /// CodeGenFileType - These enums are meant to be passed into
    215   /// addPassesToEmitFile to indicate what type of file to emit, and returned by
    216   /// it to indicate what type of file could actually be made.
    217   enum CodeGenFileType {
    218     CGFT_AssemblyFile,
    219     CGFT_ObjectFile,
    220     CGFT_Null         // Do not emit any output.
    221   };
    222 
    223   /// addPassesToEmitFile - Add passes to the specified pass manager to get the
    224   /// specified file emitted.  Typically this will involve several steps of code
    225   /// generation.  This method should return true if emission of this file type
    226   /// is not supported, or false on success.
    227   virtual bool addPassesToEmitFile(PassManagerBase &,
    228                                    formatted_raw_ostream &,
    229                                    CodeGenFileType,
    230                                    bool /*DisableVerify*/ = true,
    231                                    AnalysisID /*StartAfter*/ = nullptr,
    232                                    AnalysisID /*StopAfter*/ = nullptr) {
    233     return true;
    234   }
    235 
    236   /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
    237   /// get machine code emitted.  This uses a JITCodeEmitter object to handle
    238   /// actually outputting the machine code and resolving things like the address
    239   /// of functions.  This method returns true if machine code emission is
    240   /// not supported.
    241   ///
    242   virtual bool addPassesToEmitMachineCode(PassManagerBase &,
    243                                           JITCodeEmitter &,
    244                                           bool /*DisableVerify*/ = true) {
    245     return true;
    246   }
    247 
    248   /// addPassesToEmitMC - Add passes to the specified pass manager to get
    249   /// machine code emitted with the MCJIT. This method returns true if machine
    250   /// code is not supported. It fills the MCContext Ctx pointer which can be
    251   /// used to build custom MCStreamer.
    252   ///
    253   virtual bool addPassesToEmitMC(PassManagerBase &,
    254                                  MCContext *&,
    255                                  raw_ostream &,
    256                                  bool /*DisableVerify*/ = true) {
    257     return true;
    258   }
    259 
    260   void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
    261                          Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
    262   MCSymbol *getSymbol(const GlobalValue *GV, Mangler &Mang) const;
    263 };
    264 
    265 /// LLVMTargetMachine - This class describes a target machine that is
    266 /// implemented with the LLVM target-independent code generator.
    267 ///
    268 class LLVMTargetMachine : public TargetMachine {
    269 protected: // Can only create subclasses.
    270   LLVMTargetMachine(const Target &T, StringRef TargetTriple,
    271                     StringRef CPU, StringRef FS, TargetOptions Options,
    272                     Reloc::Model RM, CodeModel::Model CM,
    273                     CodeGenOpt::Level OL);
    274 
    275   void initAsmInfo();
    276 public:
    277   /// \brief Register analysis passes for this target with a pass manager.
    278   ///
    279   /// This registers target independent analysis passes.
    280   void addAnalysisPasses(PassManagerBase &PM) override;
    281 
    282   /// createPassConfig - Create a pass configuration object to be used by
    283   /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
    284   virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
    285 
    286   /// addPassesToEmitFile - Add passes to the specified pass manager to get the
    287   /// specified file emitted.  Typically this will involve several steps of code
    288   /// generation.
    289   bool addPassesToEmitFile(PassManagerBase &PM, formatted_raw_ostream &Out,
    290                            CodeGenFileType FileType, bool DisableVerify = true,
    291                            AnalysisID StartAfter = nullptr,
    292                            AnalysisID StopAfter = nullptr) override;
    293 
    294   /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
    295   /// get machine code emitted.  This uses a JITCodeEmitter object to handle
    296   /// actually outputting the machine code and resolving things like the address
    297   /// of functions.  This method returns true if machine code emission is
    298   /// not supported.
    299   ///
    300   bool addPassesToEmitMachineCode(PassManagerBase &PM, JITCodeEmitter &MCE,
    301                                   bool DisableVerify = true) override;
    302 
    303   /// addPassesToEmitMC - Add passes to the specified pass manager to get
    304   /// machine code emitted with the MCJIT. This method returns true if machine
    305   /// code is not supported. It fills the MCContext Ctx pointer which can be
    306   /// used to build custom MCStreamer.
    307   ///
    308   bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
    309                          raw_ostream &OS, bool DisableVerify = true) override;
    310 
    311   /// addCodeEmitter - This pass should be overridden by the target to add a
    312   /// code emitter, if supported.  If this is not supported, 'true' should be
    313   /// returned.
    314   virtual bool addCodeEmitter(PassManagerBase &,
    315                               JITCodeEmitter &) {
    316     return true;
    317   }
    318 };
    319 
    320 } // End llvm namespace
    321 
    322 #endif
    323