| /art/compiler/utils/arm/ |
| assembler_arm32.cc | 98 void Arm32Assembler::teq(Register rn, const ShifterOperand& so, Condition cond) { function in class:art::arm::Arm32Assembler
99 CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker.
100 EmitType01(cond, so.type(), TEQ, 1, rn, R0, so);
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| assembler_thumb2.cc | 100 void Thumb2Assembler::teq(Register rn, const ShifterOperand& so, Condition cond) { function in class:art::arm::Thumb2Assembler
101 CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker.
102 EmitDataProcessing(cond, TEQ, 1, rn, R0, so);
689 case TEQ:
747 case TEQ: thumb_opcode = 0b0100; set_cc = true; rd = PC; break;
872 case TEQ: break;
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| /external/chromium_org/v8/src/arm/ |
| assembler-arm.cc | 1436 void Assembler::teq(Register src1, const Operand& src2, Condition cond) { function in class:v8::internal::Assembler
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| /external/chromium_org/v8/src/mips/ |
| assembler-mips.cc | 1847 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
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| /external/chromium_org/v8/src/mips64/ |
| assembler-mips64.cc | 2042 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
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