| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 257 case ISD::ADDE: {
260 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
265 if (Opcode == ISD::ADDE) {
|
| MipsSEISelDAGToDAG.cpp | 237 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
650 case ISD::ADDE: {
|
| MipsSEISelLowering.cpp | 142 setTargetDAGCombine(ISD::ADDE);
382 // (addc multLo, Lo0), (adde multHi, Hi0),
439 // replace uses of adde and addc here
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 209 ADDE, SUBE,
[all...] |
| SelectionDAG.h | [all...] |
| /external/pcre/dist/sljit/ |
| sljitNativePPC_32.c | 124 FAIL_IF(push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)));
127 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2));
|
| sljitNativePPC_64.c | 245 FAIL_IF(push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)));
249 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2));
|
| sljitNativePPC_common.c | 134 #define ADDE (HI(31) | LO(138))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 113 setOperationAction(ISD::ADDE, VT, Expand);
213 setOperationAction(ISD::ADDE, MVT::Other, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 113 setOperationAction(ISD::ADDE, VT, Expand);
213 setOperationAction(ISD::ADDE, MVT::Other, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 206 case ISD::ADDE: return "adde";
|
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 78 ADDE, // Add using carry
|
| ARMISelLowering.cpp | 631 setOperationAction(ISD::ADDE, MVT::i32, Custom);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 222 setOperationAction(ISD::ADDE, MVT::i32, Custom);
226 setOperationAction(ISD::ADDE, MVT::i64, Custom);
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 79 setOperationAction(ISD::ADDE, MVT::i32, Legal);
[all...] |
| AMDGPUISelLowering.cpp | 314 setOperationAction(ISD::ADDE, VT, Expand);
[all...] |
| R600ISelLowering.cpp | 177 setOperationAction(ISD::ADDE, VT, Expand);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 96 setOperationAction(ISD::ADDE, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 223 setOperationAction(ISD::ADDE, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 327 case ISD::ADDE:
[all...] |
| X86ISelLowering.cpp | 444 setOperationAction(ISD::ADDE, VT, Custom);
[all...] |
