/external/valgrind/main/none/tests/mips64/ |
logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, 27 case ANDI: 30 TEST2("andi $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); 31 TEST2("andi $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); 32 TEST2("andi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); 33 TEST2("andi $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); 34 TEST2("andi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); 35 TEST2("andi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); 36 TEST2("andi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); 37 TEST2("andi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1) [all...] |
/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 301 case ANDI:
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constants-mips.h | 328 ANDI = ((1 << 3) + 4) << kOpcodeShift,
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simulator-mips.cc | [all...] |
assembler-mips.cc | 661 return GetOpcodeField(instr) == ANDI; 1563 void Assembler::andi(Register rt, Register rs, int32_t j) { function in class:v8::Assembler [all...] |
/external/chromium_org/v8/src/mips64/ |
constants-mips64.cc | 319 case ANDI:
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constants-mips64.h | 293 ANDI = ((1 << 3) + 4) << kOpcodeShift,
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assembler-mips64.cc | 633 return GetOpcodeField(instr) == ANDI; 1627 void Assembler::andi(Register rt, Register rs, int32_t j) { function in class:v8::Assembler [all...] |
simulator-mips64.cc | [all...] |
/external/pcre/dist/sljit/ |
sljitNativeMIPS_32.c | 94 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); 112 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); 316 EMIT_LOGICAL(ANDI, AND);
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sljitNativeMIPS_64.c | 181 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); 195 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); 411 EMIT_LOGICAL(ANDI, AND);
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sljitNativePPC_32.c | 174 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm);
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sljitNativeMIPS_common.c | 103 #define ANDI (HI(12)) [all...] |
sljitNativeARM_T2_32.c | 99 #define ANDI 0xf0000000 617 return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm); [all...] |
sljitNativePPC_64.c | 301 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm);
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sljitNativeARM_64.c | 70 #define ANDI 0x92000000 599 return push_inst(compiler, (ANDI ^ inv_bits) | RD(dst) | RN(reg) | inst_bits); [all...] |
sljitNativePPC_common.c | 140 #define ANDI (HI(28)) [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.h | 305 void ANDI(int Rd, int Rs, uint16_t imm);
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MIPSAssembler.cpp | 437 mMips->ANDI(Rd, Rn, src); [all...] |