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    Searched refs:COPY_TO_REGCLASS (Results 1 - 10 of 10) sorted by null

  /external/llvm/include/llvm/Target/
TargetOpcodes.h 60 /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
66 COPY_TO_REGCLASS = 10,
  /external/llvm/lib/Target/PowerPC/InstPrinter/
PPCInstPrinter.cpp 90 // For fast-isel, a COPY_TO_REGCLASS may survive this long. This is
98 if (MI->getOpcode() == TargetOpcode::COPY_TO_REGCLASS)
  /external/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCCodeEmitter.cpp 93 // For fast-isel, a float COPY_TO_REGCLASS can survive this long.
98 if (Opcode == TargetOpcode::COPY_TO_REGCLASS)
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp     [all...]
AMDGPUISelDAGToDAG.cpp 293 return CurDAG->SelectNodeTo(N, AMDGPU::COPY_TO_REGCLASS, EltVT,
  /external/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 855 // fix it up here. This COPY_TO_REGCLASS should never cause a move.v
861 Res = CurDAG->getMachineNode(Mips::COPY_TO_REGCLASS, SDLoc(Node),
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 575 /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
576 /// COPY_TO_REGCLASS is just a normal copy, except that the destination
720 // Handle COPY_TO_REGCLASS specially.
721 if (Opc == TargetOpcode::COPY_TO_REGCLASS) {
    [all...]
ScheduleDAGRRList.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp     [all...]

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