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    Searched refs:DstIsDead (Results 1 - 2 of 2) sorted by null

  /external/llvm/lib/Target/AArch64/
AArch64ExpandPseudoInsts.cpp 106 const bool DstIsDead = MI.getOperand(0).isDead();
109 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
171 const bool DstIsDead = MI.getOperand(0).isDead();
187 RegState::Define | getDeadRegState(DstIsDead && CountThree))
211 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
354 const bool DstIsDead = MI.getOperand(0).isDead();
361 RegState::Define | getDeadRegState(DstIsDead && SingleMovk))
377 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
523 bool DstIsDead = MI.getOperand(0).isDead();
527 getDeadRegState(DstIsDead && Shift == LastShift)
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  /external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 393 bool DstIsDead = MI.getOperand(OpIdx).isDead();
397 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
399 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
401 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
403 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
434 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
525 bool DstIsDead = false;
527 DstIsDead = MI.getOperand(OpIdx).isDead();
530 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
532 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
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