| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILNIDevice.cpp | 65 mHWBits.set(AMDGPUDeviceInfo::FMA);
|
| AMDILEvergreenDevice.cpp | 133 mHWBits.set(AMDGPUDeviceInfo::FMA);
147 mSWBits.set(AMDGPUDeviceInfo::FMA);
164 mSWBits.set(AMDGPUDeviceInfo::FMA);
|
| AMDILDeviceInfo.h | 46 FMA = 0xC, // Use HW FMA or SW FMA.
|
| AMDIL7XXDevice.cpp | 104 mSWBits.set(AMDGPUDeviceInfo::FMA);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILNIDevice.cpp | 65 mHWBits.set(AMDGPUDeviceInfo::FMA);
|
| AMDILEvergreenDevice.cpp | 133 mHWBits.set(AMDGPUDeviceInfo::FMA);
147 mSWBits.set(AMDGPUDeviceInfo::FMA);
164 mSWBits.set(AMDGPUDeviceInfo::FMA);
|
| AMDILDeviceInfo.h | 46 FMA = 0xC, // Use HW FMA or SW FMA.
|
| AMDIL7XXDevice.cpp | 104 mSWBits.set(AMDGPUDeviceInfo::FMA);
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 227 FADD, FSUB, FMUL, FMA, FDIV, FREM,
[all...] |
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 573 case Intrinsic::fma: ISD = ISD::FMA; break;
574 case Intrinsic::fmuladd: ISD = ISD::FMA; break;
599 // If we can't lower fmuladd into an FMA estimate the cost as a floating
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| rtl.def | 719 DEF_RTL_EXPR(FMA, "fma", "eee", RTX_TERNARY)
[all...] |
| genrtl.h | 1135 gen_rtx_fmt_eee (FMA, (MODE), (ARG0), (ARG1), (ARG2))
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 186 case ISD::FMA: return "fma";
|
| LegalizeFloatTypes.cpp | 82 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
[all...] |
| LegalizeVectorOps.cpp | 295 case ISD::FMA:
[all...] |
| LegalizeVectorTypes.cpp | 125 case ISD::FMA:
645 case ISD::FMA:
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 752 // We don't support FMA.
753 setOperationAction(ISD::FMA, MVT::f64, Expand)
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 271 setOperationAction(ISD::FMA, MVT::f32, Legal);
272 setOperationAction(ISD::FMA, MVT::f64, Legal);
273 setOperationAction(ISD::FMA, MVT::f128, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 312 setOperationAction(ISD::FMA, Ty, Legal);
[all...] |
| MipsISelLowering.cpp | 339 setOperationAction(ISD::FMA, MVT::f32, Expand);
340 setOperationAction(ISD::FMA, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 475 setOperationAction(ISD::FMA, MVT::v2f64, Expand);
543 // NEON only has FMA instructions as of VFP4.
545 setOperationAction(ISD::FMA, MVT::v2f32, Expand);
546 setOperationAction(ISD::FMA, MVT::v4f32, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 167 setOperationAction(ISD::FMA , MVT::f64, Legal);
173 setOperationAction(ISD::FMA , MVT::f32, Legal);
507 setOperationAction(ISD::FMA, MVT::v4f32, Legal);
550 setOperationAction(ISD::FMA, MVT::v2f64, Legal);
[all...] |
