| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 481 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
485 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
[all...] |
| /ndk/sources/host-tools/nawk-20071023/ |
| awk.h | 116 #define FSQRT 2
|
| lex.c | 82 { "sqrt", FSQRT, BLTIN },
|
| run.c | [all...] |
| /external/valgrind/main/none/tests/ppc32/ |
| round.c | 33 FMSUB, FNMADD, FNMSUB, FSQRT
44 "fnmsub", "fsqrt"
899 for (s = (op != FSQRT ? -1 : 1); s < 2; s += 2)
1007 case FSQRT:
1112 case FSQRT:
1113 UNOP("fsqrt");
1181 for (op = FADD; op <= FSQRT; op++) {
|
| /external/valgrind/main/none/tests/ppc64/ |
| round.c | 33 FMSUB, FNMADD, FNMSUB, FSQRT
44 "fnmsub", "fsqrt"
899 for (s = (op != FSQRT ? -1 : 1); s < 2; s += 2)
1007 case FSQRT:
1112 case FSQRT:
1113 UNOP("fsqrt");
1181 for (op = FADD; op <= FSQRT; op++) {
|
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 197 return TLI->isTypeLegal(VT) && TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
555 case Intrinsic::sqrt: ISD = ISD::FSQRT; break;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 270 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
311 Opcode = ISD::FSQRT; break;
|
| PPCISelLowering.cpp | 181 setOperationAction(ISD::FSQRT, MVT::f64, Expand);
186 setOperationAction(ISD::FSQRT, MVT::f32, Expand);
438 setOperationAction(ISD::FSQRT, VT, Expand);
511 setOperationAction(ISD::FSQRT, MVT::v4f32, Legal);
553 setOperationAction(ISD::FSQRT, MVT::v2f64, Legal);
662 setTargetDAGCombine(ISD::FSQRT);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 144 case ISD::FSQRT: return "fsqrt";
|
| LegalizeFloatTypes.cpp | 95 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
[all...] |
| LegalizeVectorOps.cpp | 277 case ISD::FSQRT:
[all...] |
| LegalizeVectorTypes.cpp | 93 case ISD::FSQRT:
609 case ISD::FSQRT:
[all...] |
| /external/chromium_org/v8/src/arm64/ |
| disasm-arm64.cc | 994 FORMAT(FSQRT, "fsqrt");
[all...] |
| constants-arm64.h | [all...] |
| assembler-arm64.cc | 1911 void Assembler::fsqrt(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/a64/ |
| disasm-a64.cc | 1001 FORMAT(FSQRT, "fsqrt");
[all...] |
| constants-a64.h | [all...] |
| assembler-a64.cc | 1353 void Assembler::fsqrt(const FPRegister& fd, function in class:vixl::Assembler
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 315 setOperationAction(ISD::FSQRT, Ty, Legal);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| assyntax.h | [all...] |
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | [all...] |
