/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCNaCl.h | 21 bool *IsStore = nullptr);
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MipsNaClELFStreamer.cpp | 150 bool IsStore; 152 &IsStore); 158 bool MaskAfter = IsSPFirstOperand && !IsStore; 203 bool *IsStore) { 204 if (IsStore) 205 *IsStore = false; 235 if (IsStore) 236 *IsStore = true; 243 if (IsStore) 244 *IsStore = true [all...] |
/external/chromium_org/v8/src/compiler/ |
change-lowering-unittest.cc | 165 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number), 210 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number), 322 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number), 462 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number),
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graph-unittest.h | 95 Matcher<Node*> IsStore(const Matcher<MachineType>& type_matcher,
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graph-unittest.cc | 727 Matcher<Node*> IsStore(const Matcher<MachineType>& type_matcher,
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/external/clang/lib/CodeGen/ |
CGAtomic.cpp | 739 bool IsStore = E->getOp() == AtomicExpr::AO__c11_atomic_store || 763 if (IsStore) 775 if (IsLoad || IsStore) 801 if (!IsStore) 805 if (!IsLoad && !IsStore) 822 if (!IsStore) { [all...] |
/external/chromium_org/v8/src/arm64/ |
instructions-arm64.cc | 45 bool Instruction::IsStore() const {
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instructions-arm64.h | 216 bool IsStore() const;
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simulator-arm64.cc | [all...] |
/external/llvm/lib/Target/X86/ |
X86MCInstLower.cpp | 296 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); 297 unsigned AddrBase = IsStore; 298 unsigned RegOp = IsStore ? 0 : 5; [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/art/compiler/dex/ |
mir_graph.h | 303 bool IsStore() const { [all...] |