| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 35 ARMHazardRecognizer(const InstrItineraryData *ItinData,
37 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"),
|
| ARMBaseInstrInfo.h | 212 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
215 int getOperandLatency(const InstrItineraryData *ItinData,
219 int getOperandLatency(const InstrItineraryData *ItinData,
245 int getVLDMDefCycle(const InstrItineraryData *ItinData,
249 int getLDMDefCycle(const InstrItineraryData *ItinData,
253 int getVSTMUseCycle(const InstrItineraryData *ItinData,
257 int getSTMUseCycle(const InstrItineraryData *ItinData,
261 int getOperandLatency(const InstrItineraryData *ItinData,
269 unsigned getInstrLatency(const InstrItineraryData *ItinData,
273 int getInstrLatency(const InstrItineraryData *ItinData,
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 36 ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0),
47 if (ItinData && !ItinData->isEmpty()) {
49 if (ItinData->isEndMarker(idx))
52 const InstrStage *IS = ItinData->beginStage(idx);
53 const InstrStage *E = ItinData->endStage(idx);
81 IssueWidth = ItinData->SchedModel->IssueWidth;
120 if (!ItinData || ItinData->isEmpty())
135 for (const InstrStage *IS = ItinData->beginStage(idx)
[all...] |
| TargetInstrInfo.cpp | 701 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
704 if (!ItinData || ItinData->isEmpty())
712 return ItinData->getOperandCycle(DefClass, DefIdx);
714 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
717 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
719 if (!ItinData || ItinData->isEmpty())
725 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
733 TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ScoreboardHazardRecognizer.h | 93 const InstrItineraryData *ItinData;
107 ScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.h | 35 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData,
37 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_),
|
| PPCInstrInfo.h | 98 int getOperandLatency(const InstrItineraryData *ItinData,
102 int getOperandLatency(const InstrItineraryData *ItinData,
105 return PPCGenInstrInfo::getOperandLatency(ItinData, DefNode, DefIdx,
|
| PPCInstrInfo.cpp | 108 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
112 int Latency = PPCGenInstrInfo::getOperandLatency(ItinData, DefMI, DefIdx,
132 Latency = getInstrLatency(ItinData, DefMI);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData,
110 virtual int getInstrLatency(const InstrItineraryData *ItinData,
|
| R600InstrInfo.cpp | 470 int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData,
110 virtual int getInstrLatency(const InstrItineraryData *ItinData,
|
| R600InstrInfo.cpp | 470 int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
|
| /external/llvm/utils/TableGen/ |
| DFAPacketizerEmitter.cpp | 51 Record *ItinData,
339 Record *ItinData,
362 ItinData->getValueAsListOfDefs("Stages");
424 Record *ItinData = ItinDataList[j];
426 collectAllInsnClasses(Name, ItinData, NStages, OS);
|
| SubtargetEmitter.cpp | 69 Record *ItinData, std::string &ItinString,
71 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
74 Record *ItinData,
293 Record *ItinData,
298 ItinData->getValueAsListOfDefs("Stages");
337 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
341 ItinData->getValueAsListOfInts("OperandCycles");
355 Record *ItinData,
359 ItinData->getValueAsListOfDefs("Bypasses");
462 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]
[all...] |
| CodeGenSchedule.cpp | 799 Record *ItinData = ItinRecords[i];
800 Record *ItinDef = ItinData->getValueAsDef("TheClass");
806 ProcModel.ItinDefList[SCI->Index] = ItinData;
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600InstrInfo.h | 203 unsigned int getInstrLatency(const InstrItineraryData *ItinData,
207 int getInstrLatency(const InstrItineraryData *ItinData,
|
| R600InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 417 bool hasHighOperandLatency(const InstrItineraryData *ItinData,
|
| X86InstrInfo.cpp | [all...] |
