/art/compiler/trampolines/ |
trampoline_compiler.cc | 37 __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); 40 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset().Int32Value()); 41 __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); 45 __ LoadFromOffset(kLoadWord, PC, R9, offset.Int32Value()); 102 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); 105 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset().Int32Value()); 106 __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); 110 __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value());
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/art/compiler/utils/arm/ |
assembler_arm.cc | 492 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); 499 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value()); 507 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 517 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), SP, src.Int32Value()); 524 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 551 assembler->LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 554 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairLow(), src_register, src_offset); 555 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairHigh(), src_register, src_offset + 4); 575 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), TR, offs.Int32Value()); 583 LoadFromOffset(kLoadWord, scratch.AsCoreRegister() [all...] |
assembler_arm.h | 546 virtual void LoadFromOffset(LoadOperandType type,
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assembler_arm32.h | 248 void LoadFromOffset(LoadOperandType type,
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assembler_thumb2.h | 278 void LoadFromOffset(LoadOperandType type,
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assembler_arm32.cc | [all...] |
assembler_thumb2.cc | [all...] |
/art/compiler/utils/mips/ |
assembler_mips.cc | 464 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 467 LoadFromOffset(kLoadWord, dst.AsRegisterPairLow(), src_register, src_offset); 468 LoadFromOffset(kLoadWord, dst.AsRegisterPairHigh(), src_register, src_offset + 4); 477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, 576 LoadFromOffset(kLoadWord, reg, SP, stack_offset); 579 LoadFromOffset(kLoadWord, RA, SP, stack_offset); 665 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); 680 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), SP, src.Int32Value()); 687 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), 698 LoadFromOffset(kLoadWord, dest.AsCoreRegister() [all...] |
assembler_mips.h | 141 void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset);
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 191 LoadFromOffset(scratch.AsCoreRegister(), SP, in_off.Int32Value()); 240 void Arm64Assembler::LoadFromOffset(Register dest, Register base, 315 LoadFromOffset(dst.AsCoreRegister(), ETR, offs.Int32Value()); 353 LoadFromOffset(scratch.AsCoreRegister(), ETR, tr_offs.Int32Value()); 362 LoadFromOffset(scratch.AsCoreRegister(), SP, fr_offs.Int32Value()); 385 LoadFromOffset(scratch.AsCoreRegister(), SP, src.Int32Value()); 404 LoadFromOffset(scratch.AsCoreRegister(), base.AsCoreRegister(), src_offset.Int32Value()); 423 LoadFromOffset(scratch.AsCoreRegister(), SP, src.Int32Value()); 458 LoadFromOffset(scratch.AsCoreRegister(), src.AsCoreRegister(), src_offset.Int32Value()); 513 LoadFromOffset(scratch.AsCoreRegister(), base.AsCoreRegister(), offs.Int32Value()) [all...] |
assembler_arm64.h | 232 void LoadFromOffset(Register dest, Register base, int32_t offset);
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/art/compiler/optimizing/ |
code_generator_arm.cc | 85 __ LoadFromOffset(kLoadWord, PC, TR, 274 __ LoadFromOffset(kLoadWord, IP, TR, Thread::StackEndOffset<kArmWordSize>().Int32Value()); 410 __ LoadFromOffset(kLoadWordPair, destination.AsArm().AsRegisterPairLow(), [all...] |