| /external/llvm/include/llvm/IR/ |
| GlobalObject.h | 30 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
32 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name), ObjComdat(nullptr) {
|
| Constant.h | 47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps)
48 : User(ty, vty, Ops, NumOps) {}
|
| InlineAsm.h | 230 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) {
231 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
233 return Kind | (NumOps << 3);
|
| User.h | 54 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps)
55 : Value(ty, vty), NumOperands(NumOps), OperandList(OpList) {}
|
| GlobalValue.h | 63 GlobalValue(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
65 : Constant(Ty, VTy, Ops, NumOps), Linkage(Linkage),
|
| Instruction.h | 463 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
465 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
|
| InstrTypes.h | 38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {}
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd)
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {}
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineRegisterInfo.cpp | 139 unsigned NumOps = MI->getNumOperands();
140 if (!(MO >= MO0 && MO < MO0+NumOps)) {
234 /// Move NumOps operands from Src to Dst, updating use-def lists as needed.
243 unsigned NumOps) {
244 assert(Src != Dst && NumOps && "Noop moveOperands");
248 if (Dst >= Src && Dst < Src + NumOps) {
250 Dst += NumOps - 1;
251 Src += NumOps - 1;
280 } while (--NumOps);
|
| CallingConvLower.cpp | 120 unsigned NumOps = Outs.size();
121 for (unsigned i = 0; i != NumOps; ++i) {
139 unsigned NumOps = ArgVTs.size();
140 for (unsigned i = 0; i != NumOps; ++i) {
|
| MachineInstr.cpp | 555 if (unsigned NumOps = MCID->getNumOperands() +
557 CapOperands = OperandCapacity::get(NumOps);
618 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping
621 unsigned NumOps, MachineRegisterInfo *MRI) {
623 return MRI->moveOperands(Dst, Src, NumOps);
628 for (unsigned i = 0; i != NumOps; ++i)
631 for (unsigned i = NumOps; i ; --i)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCallingConvLower.cpp | 136 unsigned NumOps = Outs.size();
146 for (; i != NumOps; ++i) {
164 unsigned NumOps = ArgVTs.size();
165 for (unsigned i = 0; i != NumOps; ++i) {
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 617 unsigned NumOps = Desc.getNumOperands();
619 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
621 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
626 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
627 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
631 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
|
| X86MCCodeEmitter.cpp | 735 unsigned NumOps = Desc.getNumOperands();
885 unsigned RcOperand = NumOps-1;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 173 unsigned NumOps = Desc.getNumOperands();
174 if (NumOps) {
175 bool isTwoAddr = NumOps > 1 &&
180 for (unsigned e = NumOps; i != e; ++i) {
194 for (unsigned e = NumOps; i != e; ++i) {
206 for (; i != NumOps; ++i) {
224 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
241 for (unsigned e = NumOps; i != e; ++i) {
838 unsigned NumOps = Desc->getNumOperands();
840 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) == 0
[all...] |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 700 unsigned NumOps = MCID.getNumOperands();
701 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
702 if (HasCC && MI->getOperand(NumOps-1).isDead())
726 unsigned NumOps = MCID.getNumOperands();
728 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
796 unsigned NumOps = MCID.getNumOperands();
797 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
798 if (HasCC && MI->getOperand(NumOps-1).isDead())
822 unsigned NumOps = MCID.getNumOperands();
824 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()
[all...] |
| /external/llvm/lib/IR/ |
| Instruction.cpp | 24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
42 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
44 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
|
| Instructions.cpp | 144 unsigned NumOps = e + e / 2;
145 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common.
150 ReservedSpace = NumOps;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 488 unsigned NumOps = Node->getNumOperands();
489 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
490 --NumOps; // Ignore the glue operand.
492 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
676 unsigned NumOps = N->getNumOperands();
677 if (unsigned NumLeft = NumOps) {
683 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
|
| LegalizeTypes.cpp | 417 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
[all...] |
| InstrEmitter.cpp | 608 unsigned NumOps = Node->getNumOperands();
609 assert((NumOps & 1) == 1 &&
611 for (unsigned i = 1; i != NumOps; ++i) {
[all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 663 unsigned NumOps = OldMI->getNumOperands();
664 for (unsigned I = 1; I < NumOps; ++I) {
682 unsigned NumOps = MI->getNumOperands();
712 for (unsigned I = 2; I < NumOps; ++I)
844 unsigned NumOps = MI->getNumExplicitOperands();
845 if (OpNum == NumOps - 1) {
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.cpp | 71 unsigned NumOps = 1;
91 NumOps = NumArgs;
116 OperandType, MIOperandNo, NumOps,
118 MIOperandNo += NumOps;
|
| DAGISelMatcherEmitter.cpp | 664 unsigned NumOps = P.getNumOperands();
667 ++NumOps; // Get the chained node too.
670 OS << " Result.resize(NextRes+" << NumOps << ");\n";
685 for (unsigned i = 0; i != NumOps; ++i)
|
