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    Searched refs:RegVT (Results 1 - 13 of 13) sorted by null

  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 454 EVT RegVT = VA.getLocVT();
455 switch (RegVT.getSimpleVT().SimpleTy) {
460 << RegVT.getSimpleVT().SimpleTy << "\n";
467 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
473 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue,
476 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue,
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.h 280 First(F), Range(R), SValue(SV), Reg(Rg), RegVT(RgVT), Emitted(E),
286 MVT RegVT;
SelectionDAGBuilder.cpp 610 MVT regvt, EVT valuevt)
611 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
    [all...]
LegalizeVectorOps.cpp 600 EVT RegVT = Value.getValueType();
601 EVT RegSclVT = RegVT.getScalarType();
    [all...]
LegalizeDAG.cpp 334 MVT RegVT =
339 unsigned RegBytes = RegVT.getSizeInBits() / 8;
343 SDValue StackPtr = DAG.CreateStackTemporary(StoredVT, RegVT);
356 SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
378 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
458 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT);
460 unsigned RegBytes = RegVT.getSizeInBits() / 8;
464 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
474 SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr,
493 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr
    [all...]
LegalizeIntegerTypes.cpp 747 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), VT);
749 // The argument is passed as NumRegs registers of type RegVT.
753 Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2),
769 DAG.getConstant(i * RegVT.getSizeInBits(),
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 872 EVT RegVT = VA.getLocVT();
873 if (RegVT == MVT::i8 || RegVT == MVT::i16 ||
874 RegVT == MVT::i32 || RegVT == MVT::f32) {
878 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
879 } else if (RegVT == MVT::i64) {
    [all...]
  /external/llvm/lib/Target/Mips/
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/XCore/
XCoreISelLowering.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]

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