/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 209 ADDE, SUBE, [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.cpp | 256 case ISD::SUBE: 261 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
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MipsSEISelDAGToDAG.cpp | 238 (Opc == ISD::SUBC || Opc == ISD::SUBE)) && 644 case ISD::SUBE: {
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MipsSEISelLowering.cpp | 143 setTargetDAGCombine(ISD::SUBE); 454 // (addc Lo0, multLo), (sube Hi0, multHi), 511 // replace uses of sube and subc here [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 214 case ISD::SUBE: return "sube";
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LegalizeIntegerTypes.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.h | 80 SUBE, // Sub using carry
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ARMISelLowering.cpp | 633 setOperationAction(ISD::SUBE, MVT::i32, Custom); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 111 setOperationAction(ISD::SUBE, VT, Expand);
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 111 setOperationAction(ISD::SUBE, VT, Expand);
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/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 224 setOperationAction(ISD::SUBE, MVT::i32, Custom); 228 setOperationAction(ISD::SUBE, MVT::i64, Custom); [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 81 setOperationAction(ISD::SUBE, MVT::i32, Legal); [all...] |
AMDGPUISelLowering.cpp | 315 setOperationAction(ISD::SUBE, VT, Expand); [all...] |
R600ISelLowering.cpp | 178 setOperationAction(ISD::SUBE, VT, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 98 setOperationAction(ISD::SUBE, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 446 setOperationAction(ISD::SUBE, VT, Custom); [all...] |