| /art/compiler/utils/arm/ |
| assembler_arm.cc | 417 StoreToOffset(kStoreWord, R0, SP, 0);
422 StoreToOffset(kStoreWord, reg, SP, frame_size + kFramePointerSize + (i * kFramePointerSize));
461 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
464 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value());
465 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(),
478 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
484 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
491 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
493 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4);
500 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value())
[all...] |
| assembler_arm.h | 551 virtual void StoreToOffset(StoreOperandType type,
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| assembler_arm32.h | 253 void StoreToOffset(StoreOperandType type,
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| assembler_thumb2.h | 283 void StoreToOffset(StoreOperandType type,
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| assembler_arm32.cc | [all...] |
| assembler_thumb2.cc | [all...] |
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 57 StoreToOffset(ETR, SP, offset.Int32Value());
109 void Arm64Assembler::StoreToOffset(Register source, Register base, int32_t offset) {
131 StoreToOffset(src.AsCoreRegister(), SP, offs.Int32Value());
150 StoreToOffset(src.AsCoreRegister(), SP, offs.Int32Value());
167 StoreToOffset(scratch.AsCoreRegister(), ETR, offs.Int32Value());
176 StoreToOffset(scratch.AsCoreRegister(), ETR, tr_offs.Int32Value());
190 StoreToOffset(source.AsCoreRegister(), SP, dest_off.Int32Value());
192 StoreToOffset(scratch.AsCoreRegister(), SP, dest_off.Int32Value() + 8);
354 StoreToOffset(scratch.AsCoreRegister(), SP, fr_offs.Int32Value());
363 StoreToOffset(scratch.AsCoreRegister(), ETR, tr_offs.Int32Value())
[all...] |
| assembler_arm64.h | 224 void StoreToOffset(Register source, Register base, int32_t offset);
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| /art/compiler/utils/mips/ |
| assembler_mips.cc | 511 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base,
551 StoreToOffset(kStoreWord, RA, SP, stack_offset);
555 StoreToOffset(kStoreWord, reg, SP, stack_offset);
559 StoreToOffset(kStoreWord, method_reg.AsMips().AsCoreRegister(), SP, 0);
564 StoreToOffset(kStoreWord, reg, SP, frame_size + kFramePointerSize + (i * kFramePointerSize));
604 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
607 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value());
608 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(),
621 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
627 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value())
[all...] |
| assembler_mips.h | 144 void StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset);
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| /art/compiler/optimizing/ |
| code_generator_arm.cc | 434 __ StoreToOffset(kStoreWordPair, source.AsArm().AsRegisterPairLow(),
[all...] |
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 869 TEST(Thumb2AssemblerTest, StoreToOffset) {
872 __ StoreToOffset(kStoreWord, R2, R4, 12); // Simple
873 __ StoreToOffset(kStoreWord, R2, R4, 0x2000); // Offset too big.
874 __ StoreToOffset(kStoreWord, R0, R12, 12);
875 __ StoreToOffset(kStoreHalfword, R0, R12, 12);
876 __ StoreToOffset(kStoreByte, R2, R12, 12);
882 dump(managed_code, "StoreToOffset");
[all...] |
