| /external/llvm/lib/Target/SystemZ/ |
| SystemZCallingConv.cpp | 1 //===-- SystemZCallingConv.cpp - Calling conventions for SystemZ ----------===//
15 const unsigned SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = {
16 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
19 const unsigned SystemZ::ArgFPRs[SystemZ::NumArgFPRs] =
[all...] |
| SystemZInstrInfo.cpp | 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
10 // This file contains the SystemZ implementation of the TargetInstrInfo class.
34 if (SystemZ::GRH32BitRegClass.contains(Reg))
36 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32");
44 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
63 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
64 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
91 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
128 DestReg, SrcReg, SystemZ::LR, 32
[all...] |
| SystemZCallingConv.h | 1 //===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===//
14 namespace SystemZ {
20 } // end namespace SystemZ
|
| SystemZAsmPrinter.cpp | 1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
10 // Streams SystemZ assembly language and associated data, in the form of
73 case SystemZ::Return:
74 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D);
77 case SystemZ::CallBRASL:
78 LoweredMI = MCInstBuilder(SystemZ::BRASL)
79 .addReg(SystemZ::R14D)
83 case SystemZ::CallBASR:
84 LoweredMI = MCInstBuilder(SystemZ::BASR
[all...] |
| SystemZLongBranch.cpp | 1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===//
35 // On SystemZ, long branches are only needed for functions bigger than 64k,
69 #define DEBUG_TYPE "systemz-long-branch"
138 return "SystemZ Long Branch";
215 case SystemZ::J:
219 case SystemZ::BRC:
223 case SystemZ::BRCT:
224 case SystemZ::BRCTG:
228 case SystemZ::CRJ:
229 case SystemZ::CLRJ
[all...] |
| SystemZISelLowering.cpp | 1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===//
27 #define DEBUG_TYPE "systemz-lower"
90 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
92 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
93 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
94 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass);
95 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass);
96 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass);
102 setExceptionPointerRegister(SystemZ::R6D);
103 setExceptionSelectorRegister(SystemZ::R7D)
[all...] |
| SystemZFrameLowering.cpp | 1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
27 { SystemZ::R2D, 0x10 },
28 { SystemZ::R3D, 0x18 },
29 { SystemZ::R4D, 0x20 },
30 { SystemZ::R5D, 0x28 },
31 { SystemZ::R6D, 0x30 },
32 { SystemZ::R7D, 0x38 },
33 { SystemZ::R8D, 0x40 },
34 { SystemZ::R9D, 0x48 },
35 { SystemZ::R10D, 0x50 }
[all...] |
| SystemZRegisterInfo.cpp | 1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===//
23 : SystemZGenRegisterInfo(SystemZ::R14D) {}
42 Reserved.set(SystemZ::R11D);
43 Reserved.set(SystemZ::R11L);
44 Reserved.set(SystemZ::R11H);
45 Reserved.set(SystemZ::R10Q);
49 Reserved.set(SystemZ::R15D);
50 Reserved.set(SystemZ::R15L);
51 Reserved.set(SystemZ::R15H);
52 Reserved.set(SystemZ::R14Q)
[all...] |
| SystemZShortenInst.cpp | 21 #define DEBUG_TYPE "systemz-shorten-inst"
30 return "SystemZ Instruction Shortening";
44 unsigned LowGPRs[SystemZ::NUM_TARGET_REGS];
45 unsigned HighGPRs[SystemZ::NUM_TARGET_REGS];
79 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
86 if (SystemZ::isImmLL(Imm)) {
91 if (SystemZ::isImmLH(Imm)) {
111 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
121 if (Opcode == SystemZ::IILF)
122 Changed |= shortenIIF(MI, LowGPRs, LiveHigh, SystemZ::LLILL
[all...] |
| SystemZElimCompare.cpp | 29 #define DEBUG_TYPE "systemz-elim-compare"
70 return "SystemZ Comparison Elimination";
102 if ((*SI)->isLiveIn(SystemZ::CC))
118 case SystemZ::LR:
119 case SystemZ::LGR:
120 case SystemZ::LGFR:
121 case SystemZ::LTR:
122 case SystemZ::LTGR:
123 case SystemZ::LTGFR:
124 case SystemZ::LER
[all...] |
| Makefile | 1 ##===- lib/Target/SystemZ/Makefile -------------------------*- Makefile -*-===##
12 TARGET = SystemZ
|
| SystemZRegisterInfo.h | 1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
13 #include "SystemZ.h"
21 namespace SystemZ {
30 } // end namespace SystemZ
|
| SystemZISelDAGToDAG.cpp | 1 //===-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ --===//
10 // This file defines an instruction selector for the SystemZ target.
22 #define DEBUG_TYPE "systemz-isel"
324 return "SystemZ DAG->DAG Pattern Instruction Selection";
703 if (RxSBG.Opcode == SystemZ::RNSBG)
727 if (RxSBG.Opcode != SystemZ::RNSBG)
769 if (RxSBG.Opcode != SystemZ::RNSBG) {
801 if (RxSBG.Opcode == SystemZ::RNSBG) {
828 if (RxSBG.Opcode == SystemZ::RNSBG || Opcode == ISD::SRA) {
856 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32
[all...] |
| SystemZ.h | 1 //==- SystemZ.h - Top-Level Interface for SystemZ representation -*- C++ -*-==//
11 // the LLVM SystemZ backend.
25 namespace SystemZ {
107 } // end namespace SystemZ
|
| SystemZSelectionDAGInfo.cpp | 1 //===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===//
19 #define DEBUG_TYPE "systemz-selectiondag-info"
185 DAG.getConstant(SystemZ::IPM_CC, MVT::i32));
228 Ops.push_back(DAG.getConstant(SystemZ::CCMASK_SRST, MVT::i32));
229 Ops.push_back(DAG.getConstant(SystemZ::CCMASK_SRST_FOUND, MVT::i32));
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCTargetDesc.cpp | 1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
31 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
32 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
33 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L
[all...] |
| SystemZMCFixups.h | 1 //===-- SystemZMCFixups.h - SystemZ-specific fixup entries ------*- C++ -*-===//
16 namespace SystemZ {
28 } // end namespace SystemZ
|
| SystemZMCObjectWriter.cpp | 1 //===-- SystemZMCObjectWriter.cpp - SystemZ ELF writer --------------------===//
56 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PC16DBL;
57 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PC32DBL;
58 case SystemZ::FK_390_PLT16DBL: return ELF::R_390_PLT16DBL;
59 case SystemZ::FK_390_PLT32DBL: return ELF::R_390_PLT32DBL;
76 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PLT16DBL;
77 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PLT32DBL;
98 if (IsPCRel && Kind == SystemZ::FK_390_PC32DBL)
|
| SystemZMCAsmBackend.cpp | 1 //===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
28 case SystemZ::FK_390_PC16DBL:
29 case SystemZ::FK_390_PC32DBL:
30 case SystemZ::FK_390_PLT16DBL:
31 case SystemZ::FK_390_PLT32DBL:
47 return SystemZ::NumTargetFixupKinds;
61 llvm_unreachable("SystemZ does do not have assembler relaxation");
72 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
|
| SystemZMCCodeEmitter.cpp | 1 //===-- SystemZMCCodeEmitter.cpp - Convert SystemZ code to machine code ---===//
85 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC16DBL, 2);
90 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC32DBL, 2);
|
| /external/llvm/ |
| configure | [all...] |
