/external/llvm/lib/Target/Mips/ |
MipsInstrInfo.cpp | 87 MachineBasicBlock *&TBB, 92 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs); 98 MachineBasicBlock *TBB, DebugLoc DL, 113 MIB.addMBB(TBB); 117 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 122 assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 134 BuildCondBr(MBB, TBB, DL, Cond); 142 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB); 144 BuildCondBr(MBB, TBB, DL, Cond); 184 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, [all...] |
MipsInstrInfo.h | 54 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 61 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 69 BranchType AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 138 void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL,
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/external/llvm/lib/Target/NVPTX/ |
NVPTXInstrInfo.cpp | 153 /// just return false, leaving TBB/FBB null. 154 /// 2. If this block ends with only an unconditional branch, it sets TBB to be 157 /// an successor block, it sets TBB to be the branch destination block and a 162 /// block, it returns the 'true' destination in TBB, the 'false' destination 171 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 184 TBB = LastInst->getOperand(0).getMBB(); 188 TBB = LastInst->getOperand(1).getMBB(); 206 TBB = SecondLastInst->getOperand(1).getMBB(); 216 TBB = SecondLastInst->getOperand(0).getMBB(); 252 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB [all...] |
NVPTXInstrInfo.h | 64 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 68 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
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/external/llvm/lib/CodeGen/ |
EarlyIfConversion.cpp | 72 // | [TF]BB FBB TBB 77 // Instructions in the conditional blocks TBB and/or FBB are spliced into the 94 MachineBasicBlock *TBB; 99 /// isTriangle - When there is no 'else' block, either TBB or FBB will be 101 bool isTriangle() const { return TBB == Tail || FBB == Tail; } 104 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; } 136 /// Insertion point in Head for speculatively executed instructions form TBB 342 TBB = FBB = Tail = nullptr; 389 if (TII->AnalyzeBranch(*Head, TBB, FBB, Cond)) [all...] |
MachineBasicBlock.cpp | 397 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 400 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond); 404 if (TBB) { 407 if (isLayoutSuccessor(TBB)) 416 assert(!TBB && "Found more than one non-landing-pad successor!"); 417 TBB = *SI; 422 if (!TBB) 427 if (!isLayoutSuccessor(TBB)) 428 TII->InsertBranch(*this, TBB, nullptr, Cond, dl); 435 if (isLayoutSuccessor(TBB)) { [all...] |
BranchFolding.cpp | 205 MachineBasicBlock *MBB = I, *TBB = nullptr, *FBB = nullptr; 207 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true)) 208 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty()); 470 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 474 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) { 476 if (TBB == NextBB && !Cond.empty() && !FBB) { [all...] |
MachineBlockPlacement.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430InstrInfo.cpp | 173 MachineBasicBlock *&TBB, 203 TBB = I->getOperand(0).getMBB(); 215 TBB = nullptr; 221 // TBB is used to indicate the unconditinal destination. 222 TBB = I->getOperand(0).getMBB(); 235 FBB = TBB; 236 TBB = I->getOperand(0).getMBB(); 244 assert(TBB); 248 if (TBB != I->getOperand(0).getMBB()) 263 MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, [all...] |
MSP430InstrInfo.h | 79 MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 84 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.h | 66 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 73 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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SparcInstrInfo.cpp | 129 MachineBasicBlock *&TBB, 156 TBB = I->getOperand(0).getMBB(); 167 TBB = nullptr; 174 TBB = I->getOperand(0).getMBB(); 218 FBB = TBB; 219 TBB = I->getOperand(0).getMBB(); 231 SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, 235 assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 241 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); 249 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC) [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.h | 53 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 58 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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XCoreInstrInfo.cpp | 176 /// just return false, leaving TBB/FBB null. 177 /// 2. If this block ends with only an unconditional branch, it sets TBB to be 180 /// an successor block, it sets TBB to be the branch destination block and a 185 /// block, it returns the 'true' destination in TBB, the 'false' destination 194 XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 217 TBB = LastInst->getOperand(0).getMBB(); 228 TBB = LastInst->getOperand(1).getMBB(); 250 TBB = SecondLastInst->getOperand(1).getMBB(); 262 TBB = SecondLastInst->getOperand(0).getMBB(); 282 XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600InstrInfo.cpp | 178 MachineBasicBlock *&TBB, 208 TBB = LastInst->getOperand(0).getMBB(); 215 TBB = LastInst->getOperand(0).getMBB(); 238 TBB = SecondLastInst->getOperand(0).getMBB(); 262 MachineBasicBlock *TBB, 267 assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0); 280 .addMBB(TBB) 290 .addMBB(TBB)
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R600InstrInfo.h | 68 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 71 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600InstrInfo.cpp | 178 MachineBasicBlock *&TBB, 208 TBB = LastInst->getOperand(0).getMBB(); 215 TBB = LastInst->getOperand(0).getMBB(); 238 TBB = SecondLastInst->getOperand(0).getMBB(); 262 MachineBasicBlock *TBB, 267 assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0); 280 .addMBB(TBB) 290 .addMBB(TBB)
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R600InstrInfo.h | 68 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 71 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
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/external/llvm/lib/Target/AArch64/ |
AArch64A53Fix835769.cpp | 135 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 140 if (S == PrevBB && !TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond) && 141 !TBB && !FBB)
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AArch64ConditionalCompares.cpp | 270 // corresponding to TBB. 498 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 499 if (TII->AnalyzeBranch(*Head, TBB, FBB, HeadCond)) { 507 if (!TBB || HeadCond.empty()) { 520 if (TBB != CmpBB) { 521 assert(TBB == Tail && "Unexpected TBB"); 526 TBB = FBB = nullptr; 527 if (TII->AnalyzeBranch(*CmpBB, TBB, FBB, CmpBBCond)) { 533 if (!TBB || CmpBBCond.empty()) [all...] |
AArch64InstrInfo.h | 127 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 132 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 161 MachineBasicBlock *TBB,
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/external/llvm/unittests/IR/ |
IRBuilderTest.cpp | 82 BasicBlock *TBB = BasicBlock::Create(Ctx, "", F); 85 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB); 89 EXPECT_EQ(TBB, TI->getSuccessor(0)); 94 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights); 98 EXPECT_EQ(TBB, TI->getSuccessor(0));
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/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.cpp | 337 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 364 TBB = LastInst->getOperand(0).getMBB(); 370 TBB = LastInst->getOperand(2).getMBB(); 378 TBB = LastInst->getOperand(1).getMBB(); 386 TBB = LastInst->getOperand(1).getMBB(); 396 TBB = LastInst->getOperand(0).getMBB(); 407 TBB = LastInst->getOperand(0).getMBB(); 432 TBB = SecondLastInst->getOperand(2).getMBB(); 442 TBB = SecondLastInst->getOperand(1).getMBB(); 452 TBB = SecondLastInst->getOperand(1).getMBB() [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.cpp | 242 MachineBasicBlock *&TBB, 278 TBB = Branch.Target->getMBB(); 291 TBB = nullptr; 297 // TBB is used to indicate the unconditinal destination. 298 TBB = Branch.Target->getMBB(); 305 FBB = TBB; 306 TBB = Branch.Target->getMBB(); 313 assert(Cond.size() == 2 && TBB && "Should have seen a conditional branch"); 317 if (TBB != Branch.Target->getMBB()) 363 SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, [all...] |
/external/llvm/lib/Transforms/Utils/ |
FlattenCFG.cpp | 223 TerminatorInst *TBB = LastCondBlock->getTerminator(); 224 BasicBlock *PS1 = TBB->getSuccessor(0); 225 BasicBlock *PS2 = TBB->getSuccessor(1);
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