/external/llvm/include/llvm/MC/ |
MCSubtargetInfo.h | 110 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, 117 if (I->UseIdx < UseIdx) 119 if (I->UseIdx > UseIdx)
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MCInstrItineraries.h | 196 /// itinerary class UseClass, operand index UseIdx. 198 unsigned UseClass, unsigned UseIdx) const { 208 if ((FirstUseIdx + UseIdx) >= LastUseIdx) 212 Forwardings[FirstUseIdx + UseIdx]; 219 unsigned UseClass, unsigned UseIdx) const { 227 int UseCycle = getOperandCycle(UseClass, UseIdx); 233 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx))
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MCSchedule.h | 84 /// MCReadAdvanceEntries are sorted first by operand index (UseIdx), then by 87 unsigned UseIdx; 92 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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/external/llvm/lib/CodeGen/ |
TargetSchedule.cpp | 145 unsigned UseIdx = 0; 149 ++UseIdx; 151 return UseIdx; 203 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); 204 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID);
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LiveRangeEdit.cpp | 83 /// OrigIdx are also available with the same value at UseIdx. 86 SlotIndex UseIdx) const { 88 UseIdx = UseIdx.getRegSlot(true); 109 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) 112 if (OVNI != li.getVNInfoAt(UseIdx)) 119 SlotIndex UseIdx, 142 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx))
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SplitKit.h | 315 /// defFromParent - Define Reg from ParentVNI at UseIdx using either 319 SlotIndex UseIdx,
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TargetInstrInfo.cpp | 703 SDNode *UseNode, unsigned UseIdx) const { 714 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); 792 const MachineInstr *UseMI, unsigned UseIdx) const { 795 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); 825 /// UseIdx to compute min latency. 829 const MachineInstr *UseMI, unsigned UseIdx) const { 839 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
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InlineSpiller.cpp | 856 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); 857 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); 866 DEBUG(dbgs() << UseIdx << '\t' << *MI); 878 if (!Edit->canRematerializeAt(RM, UseIdx, false)) { 880 DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI); [all...] |
MachineVerifier.cpp | [all...] |
RegisterCoalescer.cpp | 627 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); 628 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); 679 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true); 680 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); 699 SlotIndex DefIdx = UseIdx.getRegSlot(); [all...] |
MachineInstr.cpp | [all...] |
TwoAddressInstructionPass.cpp | 375 SlotIndex useIdx = LIS->getInstructionIndex(MI); 376 LiveInterval::const_iterator I = LI.find(useIdx); 378 return !I->end.isBlock() && SlotIndex::isSameInstr(I->end, useIdx); [all...] |
SplitKit.cpp | 432 SlotIndex UseIdx, 445 if (Edit->canRematerializeAt(RM, UseIdx, true)) { [all...] |
/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.h | 218 unsigned UseIdx) const override; 221 SDNode *UseNode, unsigned UseIdx) const override; 256 unsigned UseIdx, unsigned UseAlign) const; 260 unsigned UseIdx, unsigned UseAlign) const; 265 unsigned UseIdx, unsigned UseAlign) const; 280 unsigned UseIdx) const override;
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ARMBaseInstrInfo.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
LiveRangeEdit.h | 86 /// OrigIdx are also available with the same value at UseIdx. 88 SlotIndex UseIdx) const; 181 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI. 184 SlotIndex UseIdx,
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MachineInstr.h | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.h | 101 unsigned UseIdx) const override; 104 SDNode *UseNode, unsigned UseIdx) const override { 106 UseNode, UseIdx);
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PPCInstrInfo.cpp | 111 unsigned UseIdx) const { 113 UseMI, UseIdx); [all...] |
/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | [all...] |
/external/llvm/utils/TableGen/ |
SubtargetEmitter.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 421 unsigned UseIdx) const override;
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X86InstrInfo.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | [all...] |