| /art/runtime/arch/arm64/ |
| registers_arm64.h | 51 X24 = 24,
|
| quick_method_frame_info_arm64.h | 37 (1 << art::arm64::X23) | (1 << art::arm64::X24) | (1 << art::arm64::X25) |
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 161 callee_save_regs_.push_back(Arm64ManagedRegister::FromCoreRegister(X24));
181 return 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 | 1 << X25 |
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 422 // X23/X24 pair = 0x00000004,
434 else if (Reg1 == AArch64::X23 && Reg2 == AArch64::X24 &&
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 167 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
|
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 671 StoreToOffset(X24, SP, reg_offset);
742 LoadFromOffset(X24, SP, reg_offset);
|
| managed_register_arm64_test.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 55 case AArch64::X24: return AArch64::W24;
95 case AArch64::W24: return AArch64::X24;
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 64 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
75 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 160 {PPC::X24, -64},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 374 AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
[all...] |
| /external/valgrind/main/memcheck/ |
| mc_machine.c | [all...] |
