| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S | 76 #define dW2 D1.S16
130 VUZP dW1,dW2
135 VMLAL qT0,dX3,dW2 @// real part
137 VMLSL qT1,dX1,dW2 @// imag part
141 VMLSL qT0,dX3,dW2 @// real part
143 VMLAL qT1,dX1,dW2 @// imag part
|
| armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 80 #define dW2 D1.F32
145 VLD1 dW2,[pTwiddle] @//[wi | wr]
193 VMUL dZr2,dXr2,dW2[0]
194 VMUL dZi2,dXi2,dW2[0]
204 VMLA dZr2,dXi2,dW2[1] @// real part
205 VMLS dZi2,dXr2,dW2[1] @// imag part
215 VMUL dZr2,dXr2,dW2[0]
216 VMUL dZi2,dXi2,dW2[0]
226 VMLS dZr2,dXi2,dW2[1] @// real part
227 VMLA dZi2,dXr2,dW2[1] @// imag par
[all...] |
| armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 87 #define dW2 D1.S16
155 VLD1 dW2,[pTwiddle :64] @//[wi | wr]
202 VMULL qT2,dXr2,dW2[0]
203 VMLAL qT2,dXi2,dW2[1] @// real part
204 VMULL qT3,dXi2,dW2[0]
205 VMLSL qT3,dXr2,dW2[1] @// imag part
208 VMULL qT2,dXr2,dW2[0]
209 VMLSL qT2,dXi2,dW2[1] @// real part
210 VMULL qT3,dXi2,dW2[0]
211 VMLAL qT3,dXr2,dW2[1] @// imag par
[all...] |
| armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 89 #define dW2 D1.S32
154 VLD1 dW2,[pTwiddle] @//[wi | wr]
213 VMULL qT2,dXr2,dW2[0]
214 VMLAL qT2,dXi2,dW2[1] @// real part
215 VMULL qT3,dXi2,dW2[0]
216 VMLSL qT3,dXr2,dW2[1] @// imag part
219 VMULL qT2,dXr2,dW2[0]
220 VMLSL qT2,dXi2,dW2[1] @// real part
221 VMULL qT3,dXi2,dW2[0]
222 VMLAL qT3,dXr2,dW2[1] @// imag par
[all...] |
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| armSP_FFT_CToC_FC32_Radix4_s.S | 83 #define dW2 v1.2s
136 ld1 {dW2},[pTwiddle] //[wi | wr]
187 fmul dZr2,dXr2,dW2[0]
188 fmul dZi2,dXi2,dW2[0]
198 fmla dZr2,dXi2,dW2[1] // real part
199 fmls dZi2,dXr2,dW2[1] // imag part
209 fmul dZr2,dXr2,dW2[0]
210 fmul dZi2,dXi2,dW2[0]
220 fmls dZr2,dXi2,dW2[1] // real part
221 fmla dZi2,dXr2,dW2[1] // imag par
[all...] |
