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  /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/
armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S 76 #define dXr1 d4.s32
105 VLD4 {dXr0,dXi0,dXr1,dXi1},[pSrc :128]!
109 VMULL qT0,dWr,dXr1
112 VMLSL qT1,dWi,dXr1 @// imag part
116 VMULL qT0,dWr,dXr1
119 VMLAL qT1,dWi,dXr1 @// imag part
123 VRSHRN dXr1,qT0,#31
129 VHSUB dYr0,dXr0,dXr1
131 VHADD dYr1,dXr0,dXr1
136 VSUB dYr0,dXr0,dXr1
    [all...]
armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S 84 #define dXr1 D4.S16
119 VLD4 {dXr0[0],dXi0[0],dXr1[0],dXi1[0]},[pSrc]! @// grp 0
120 VLD4 {dXr0[1],dXi0[1],dXr1[1],dXi1[1]},[pSrc]! @// grp 1
123 @//VLD4 {dXr0,dXi0,dXr1,dXi1},[pSrc],#32
127 VMULL qT0,dXr1,dWr
130 VMLSL qT1,dXr1,dWi @// imag part
133 VMULL qT0,dXr1,dWr
136 VMLAL qT1,dXr1,dWi @// imag part
140 VRSHRN dXr1,qT0,#15
146 VHSUB dYr0,dXr0,dXr1
    [all...]
armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S 67 #define dXr1 d4.f32
100 @ dXr1 = [pSrc[1].Re, pSrc[3].Re]
102 VLD4 {dXr0,dXi0,dXr1,dXi1},[pSrc :128]!
106 VMUL qT0,dWr,dXr1
109 VMLS qT1,dWi,dXr1 @// imag part
113 VMUL qT0,dWr,dXr1
116 VMLA qT1,dWi,dXr1 @// imag part
armSP_FFT_CToC_FC32_Radix4_unsafe_s.S 85 #define dXr1 D6.F32
167 VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1]
191 VMUL dZr1,dXr1,dW1[0]
199 VMLS dZi1,dXr1,dW1[1] @// imag part
202 VLD2 {dXr1,dXi1},[pSrc],pointStep
213 VMUL dZr1,dXr1,dW1[0]
221 VMLA dZi1,dXr1,dW1[1] @// imag part
224 VLD2 {dXr1,dXi1},[pSrc],pointStep
armSP_FFT_CToC_SC16_Radix4_unsafe_s.S 92 #define dXr1 D6.S16
182 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
188 VMULL qT0,dXr1,dW1[0]
191 VMLSL qT1,dXr1,dW1[1] @// imag part
194 VMULL qT0,dXr1,dW1[0]
197 VMLAL qT1,dXr1,dW1[1] @// imag part
armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S 81 #define dXr1 D2.S32
134 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
182 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
204 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
244 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
266 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S 73 #define dXr1 D2.F32
127 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
176 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
203 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S 81 #define dXr1 D2.S16
133 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
178 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
232 VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
armSP_FFT_CToC_SC32_Radix4_unsafe_s.S 94 #define dXr1 D6.S32
175 VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1]
197 VMULL qT0,dXr1,dW1[0]
200 VMLSL qT1,dXr1,dW1[1] @// imag part
203 VMULL qT0,dXr1,dW1[0]
206 VMLAL qT1,dXr1,dW1[1] @// imag part
210 VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1] for next iteration
armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S 81 #define dXr1 D2.F32
193 VMUL dZr1,dW1r,dXr1
196 VMLS dZi1,dW1i,dXr1 @// imag part
200 VMUL dZr1,dW1r,dXr1
203 VMLA dZi1,dW1i,dXr1 @// imag part
armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S 96 #define dXr1 D2.S16
216 VMULL qT0,dXr1,dW1r
219 VMLSL qT1,dXr1,dW1i @// imag part
222 VMULL qT0,dXr1,dW1r
225 VMLAL qT1,dXr1,dW1i @// imag part
armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S 89 #define dXr1 D2.S32
198 VMULL qT0,dW1r,dXr1
201 VMLSL qT1,dW1i,dXr1 @// imag part
205 VMULL qT0,dW1r,dXr1
208 VMLAL qT1,dW1i,dXr1 @// imag part
armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S 73 #define dXr1 D2.F32
204 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
293 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S 84 #define dXr1 D2.S16
225 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
314 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
476 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S 83 #define dXr1 D2.S32
218 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
305 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
464 VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
  /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/
armSP_FFT_CToC_FC32_Radix2_ls_s.S 68 #define dXr1 v4.2s
103 // dXr1 = [pSrc[1].Re, pSrc[3].Re]
105 ld4 {dXr0,dXi0,dXr1,dXi1}, [pSrc], #32
110 fmul qT0,dWr,dXr1
113 fmls qT1,dWi,dXr1 // imag part
117 fmul qT0,dWr,dXr1
120 fmla qT1,dWi,dXr1 // imag part
armSP_FFT_CToC_FC32_Radix4_s.S 88 #define dXr1 v6.2s
160 ld2 {dXr1,dXi1},[pSrc],pointStep // data[1]
185 fmul dZr1,dXr1,dW1[0]
193 fmls dZi1,dXr1,dW1[1] // imag part
196 ld2 {dXr1,dXi1},[pSrc],pointStep
207 fmul dZr1,dXr1,dW1[0]
215 fmla dZi1,dXr1,dW1[1] // imag part
218 ld2 {dXr1,dXi1},[pSrc],pointStep
armSP_FFT_CToC_FC32_Radix4_fs_s.S 73 #define dXr1 v2.2s
119 ld2 {dXr1,dXi1}, [pSrc], pointStep // data[1]
165 fadd dYr1, dXr1, dXr3
169 fsub dYr3, dXr1, dXr3
177 ld2 {dXr1,dXi1}, [pSrc], step1 // data[1]
211 ld2 {dXr1,dXi1}, [pSrc], step1 // data[1]
armSP_FFT_CToC_FC32_Radix4_ls_s.S 88 #define dXr1 v2.2s
216 fmul dZr1,dW1r,dXr1
219 fmls dZi1,dW1i,dXr1 // imag part
223 fmul dZr1,dW1r,dXr1
226 fmla dZi1,dW1i,dXr1 // imag part
armSP_FFT_CToC_FC32_Radix8_fs_s.S 73 #define dXr1 v2.2s
210 ld2 {dXr1,dXi1},[pSrc],pointStep // data[1]
239 fadd dUr2,dXr1,dXr5
290 fsub dUr3,dXr1,dXr5
315 fsub dUr3,dXr1,dXr5
340 ld2 {dXr1,dXi1},[pSrc],pointStep // data[1]

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