/development/ndk/platforms/android-9/arch-mips/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 141 #define INT_SRA dsra 186 #define LONG_SRA dsra 241 #define PTR_SRA dsra
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/external/llvm/test/MC/Mips/mips2/ |
invalid-mips3.s | 29 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 30 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 31 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips4.s | 32 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 33 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 34 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips5.s | 31 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 32 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 33 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips3/ |
valid.s | 69 dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] 70 dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] 71 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
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/external/llvm/test/MC/Mips/mips4/ |
valid.s | 71 dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] 72 dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] 73 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
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/external/llvm/test/MC/Mips/mips5/ |
valid.s | 71 dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] 72 dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] 73 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
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/external/llvm/test/MC/Mips/mips64/ |
valid.s | 76 dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] 77 dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] 78 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
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/external/chromium_org/v8/test/cctest/ |
test-disasm-mips64.cc | 466 COMPARE(dsra(a0, a1, 0), 467 "0005203b dsra a0, a1, 0"); 468 COMPARE(dsra(s0, s1, 8), 469 "0011823b dsra s0, s1, 8"); 470 COMPARE(dsra(a6, a7, 24), 471 "000b563b dsra a6, a7, 24"); 472 COMPARE(dsra(v0, v1, 31), 473 "000317fb dsra v0, v1, 31");
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/external/llvm/test/MC/Mips/mips1/ |
invalid-mips3.s | 33 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 34 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 35 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips4.s | 34 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 35 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 36 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips5.s | 33 dsra $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 34 dsra $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 35 dsra $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips64r2/ |
valid.s | 84 dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] 85 dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] 86 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
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/external/chromium_org/v8/src/mips64/ |
disasm-mips64.cc | 717 case DSRA: 718 Format(instr, "dsra 'rd, 'rt, 'sa"); [all...] |