| /external/clang/test/Sema/ |
| variadic-promotion.c | 5 void test_floating_promotion(__fp16 *f16, float f32, double f64) {
6 variadic(3, *f16, f32, f64);
|
| extern-redecl.c | 6 void f16(void) { function
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
| u_half.h | 56 uint16_t f16; local
68 f16 = 0x7c00;
71 f16 = 0x7e00;
82 f16 = f32.ui >> 13;
86 f16 |= sign >> 16;
88 return f16;
92 util_half_to_float(uint16_t f16)
103 f32.ui = (f16 & 0x7fff) << 13;
113 f32.ui |= (f16 & 0x8000) << 16;
|
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_half.h | 56 uint16_t f16; local
68 f16 = 0x7c00;
71 f16 = 0x7e00;
82 f16 = f32.ui >> 13;
86 f16 |= sign >> 16;
88 return f16;
92 util_half_to_float(uint16_t f16)
103 f32.ui = (f16 & 0x7fff) << 13;
113 f32.ui |= (f16 & 0x8000) << 16;
|
| /external/valgrind/main/none/tests/ppc32/ |
| test_dfp3.c | 32 register double f16 __asm__ ("fr16");
91 __asm__ __volatile__ ("drintx 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
93 __asm__ __volatile__ ("drintx 0, %0, %1, 0" : "=f" (f18) : "f" (f16));
97 __asm__ __volatile__ ("drintx 1, %0, %1, 1" : "=f" (f18) : "f" (f16));
99 __asm__ __volatile__ ("drintx 0, %0, %1, 1" : "=f" (f18) : "f" (f16));
103 __asm__ __volatile__ ("drintx 1, %0, %1, 2" : "=f" (f18) : "f" (f16));
105 __asm__ __volatile__ ("drintx 0, %0, %1, 2" : "=f" (f18) : "f" (f16));
109 __asm__ __volatile__ ("drintx 1, %0, %1, 3" : "=f" (f18) : "f" (f16));
111 __asm__ __volatile__ ("drintx 0, %0, %1, 3" : "=f" (f18) : "f" (f16));
127 __asm__ __volatile__ ("drintn 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
[all...] |
| test_dfp1.c | 31 register double f16 __asm__ ("fr16");
85 __asm__ __volatile__ ("dadd. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
87 __asm__ __volatile__ ("dadd %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
93 __asm__ __volatile__ ("dsub. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
95 __asm__ __volatile__ ("dsub %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
101 __asm__ __volatile__ ("dmul. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
103 __asm__ __volatile__ ("dmul %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
109 __asm__ __volatile__ ("ddiv. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
111 __asm__ __volatile__ ("ddiv %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
118 __asm__ __volatile__ ("daddq. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
[all...] |
| test_dfp5.c | 93 _Decimal64 f16 = valB.dec_val; local
101 __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val1), "f" (f14), "f" (f16));
104 __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val2), "f" (f14), "f" (f16));
107 __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val3), "f" (f14), "f" (f16));
117 _Decimal128 f16 = valB.dec_val128; local
125 __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val1), "f" (f14), "f" (f16));
128 __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val2), "f" (f14), "f" (f16));
131 __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val3), "f" (f14), "f" (f16));
143 _Decimal64 f16 = valB.dec_val; local
146 __asm__ __volatile__ ("ddedpd. 0, %0, %1" : "=f" (ret) : "f" (f16));
170 _Decimal128 f16 = valB.dec_val128; local
196 _Decimal64 f16 = valB.dec_val; local
217 _Decimal128 f16 = valB.dec_val128; local
[all...] |
| /external/clang/test/Index/ |
| linkage.c | 17 void f16(void) { function
|
| /ndk/tests/build/issue17144-byteswap/jni/ |
| issue17144-byteswap.c | 8 int16_t f16(int16_t i) function
|
| /external/clang/test/CodeGen/ |
| tbaa.cpp | 11 uint16_t f16; member in struct:__anon2410
18 uint16_t f16; member in struct:__anon2411
24 uint16_t f16; member in struct:__anon2412
30 uint16_t f16; member in struct:__anon2413
38 uint16_t f16; member in struct:__anon2414
43 uint16_t f16; member in struct:__anon2415
67 A->f16 = 4;
91 B->a.f16 = 4;
139 S->f16 = 4;
163 S2->f16 = 4
[all...] |
| tbaa-class.cpp | 12 uint16_t f16; member in class:StructA
20 uint16_t f16; member in class:StructB
27 uint16_t f16; member in class:StructC
34 uint16_t f16; member in class:StructD
43 uint16_t f16; member in class:StructS
73 A->f16 = 4;
97 B->a.f16 = 4;
145 S->f16 = 4;
|
| /external/llvm/test/MC/ARM/ |
| invalid-fp-armv8.s | 5 vcvtt.f64.f16 d3, s1
6 @ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
7 vcvtt.f16.f64 s5, d12
8 @ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
68 vcvtbgt.f64.f16 q0, d3
70 vcvttlt.f64.f16 s0, s3
72 vcvttvs.f16.f64 s0, s3
74 vcvtthi.f16.f64 q0, d3
|
| fp-armv8.s | 5 vcvtt.f64.f16 d3, s1
6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
7 vcvtt.f16.f64 s5, d12
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
15 vcvttge.f64.f16 d3, s1
16 @ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xae
[all...] |
| thumb-fp-armv8.s | 5 vcvtt.f64.f16 d3, s1
6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
7 vcvtt.f16.f64 s5, d12
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
16 vcvttge.f64.f16 d3, s1
17 @ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b
[all...] |
| neont2-convert-encoding.s | 37 @ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07]
38 vcvt.f32.f16 q8, d16
39 @ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06]
40 vcvt.f16.f32 d16, q8
|
| /external/clang/test/CXX/except/except.spec/ |
| p5-virtual.cpp | 46 virtual void f16();
82 virtual void f16() throw();
|
| /external/compiler-rt/lib/builtins/ppc/ |
| restFP.S | 25 lfd f16,-128(r1)
|
| saveFP.S | 23 stfd f16,-128(r1)
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 44 #define ft4 $f16
75 #define fa4 $f16
|
