/external/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 783 return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 805 return findRegisterUseOperandIdx(Reg, true, TRI) != -1; [all...] |
/external/llvm/lib/Target/R600/ |
R600EmitClauseMarkers.cpp | 212 if (UseI->findRegisterUseOperandIdx(MOI->getReg()))
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R600InstrInfo.cpp | 237 return MI->findRegisterUseOperandIdx(AMDGPU::AR_X) != -1; [all...] |
/external/llvm/lib/CodeGen/ |
StackSlotColoring.cpp | 401 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) {
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RegisterCoalescer.cpp | 499 int UIdx = ValSEndInst->findRegisterUseOperandIdx(IntB.reg, true); 655 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false); [all...] |
MachineInstr.cpp | [all...] |
TwoAddressInstructionPass.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZElimCompare.cpp | 397 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI);
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/external/llvm/lib/Target/ARM/ |
ARMLoadStoreOptimizer.cpp | 689 int Idx = memOps[j].MBBI->findRegisterUseOperandIdx(Reg, true); 774 bool BaseKill = Loc->findRegisterUseOperandIdx(Base, true) != -1; [all...] |
ARMBaseInstrInfo.cpp | [all...] |