/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
nv50_ir_lowering_nv50.cpp | 88 i[5] = bld->mkOp3(OP_MAD, fTy, mul->getDef(0), a[1], b[1], r[2]); 96 bld->mkMov(mul->getDef(0), t[3]); 318 i->getDef(0)->reg.size = 2; // $aX are only 16 bit 348 arl = bld.mkOp2(OP_SHL, TYPE_U32, i->getDef(0), bld.getSSA(), bld.mkImm(0)); 357 Value *def = mul->getDef(0); 366 Value *res = cloneShallow(func, mul->getDef(0)); 369 add->setSrc(0, mul->getDef(0)); 505 if (insn->defExists(0) && insn->getDef(0)->reg.file == FILE_ADDRESS) 570 tid = bld.mkMov(bld.getScratch(), arg, TYPE_U32)->getDef(0); 662 bld.mkCvt(OP_CVT, TYPE_U8, flags, TYPE_U32, cond->getDef(0)) [all...] |
nv50_ir_peephole.cpp | 51 if (!getDef(0)->equals(getSrc(0))) 70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0) 106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) { 218 if (ld->getDef(0)->refCount() == 0) 577 mul2->def(0).replace(mul1->getDef(0), false); 583 mul2->def(0).replace(mul1->getDef(0), false); 591 if (mul2->getDef(0)->refCount() == 1 && !mul2->saturate) { 595 insn = mul2->getDef(0)->uses.front()->getInsn(); 600 s2 = insn->getSrc(0) == mul1->getDef(0) ? 0 : 1 [all...] |
nv50_ir_ra.cpp | 373 mov->setDef(0, new_LValue(func, phi->getDef(0)->asLValue())); 374 phi->setSrc(j, mov->getDef(0)); 412 LValue *tmp = new_LValue(func, cal->getDef(d)->asLValue()); 418 mov->setDef(0, cal->getDef(d)); 496 bb->liveSet.clr(i->getDef(d)->id); 502 bb->liveSet.clr(i->getDef(0)->id); 551 bb->liveSet.clr(i->getDef(0)->id); 572 bb->liveSet.clr(i->getDef(d)->id); 573 if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs 574 i->getDef(d)->livei.extend(i->serial, i->serial) [all...] |
nv50_ir.cpp | 743 i->setDef(d, pol.get(getDef(d))); 768 if (getDef(i)->reg.file != getDef(d)->reg.file) 842 if (getDef(d)->inFile(FILE_PREDICATE) || getDef(d)->inFile(FILE_FLAGS)) 852 if (a->getDef(d)->interfers(b->getSrc(s))) 862 if (a->getDef(d)->interfers(b->getDef(c)))
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nv50_ir_build_util.cpp | 188 insn->getDef(0)->reg.data.id = id; 289 val = mkMov(getSSA(halfSize * 2), val, fTy)->getDef(0);
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nv50_ir_ssa.cpp | 249 assigned.set(i->getDef(d)->id); 281 bb->defSet.set(i->getDef(d)->id);
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_lowering_nv50.cpp | 88 i[5] = bld->mkOp3(OP_MAD, fTy, mul->getDef(0), a[1], b[1], r[2]); 96 bld->mkMov(mul->getDef(0), t[3]); 318 i->getDef(0)->reg.size = 2; // $aX are only 16 bit 348 arl = bld.mkOp2(OP_SHL, TYPE_U32, i->getDef(0), bld.getSSA(), bld.mkImm(0)); 357 Value *def = mul->getDef(0); 366 Value *res = cloneShallow(func, mul->getDef(0)); 369 add->setSrc(0, mul->getDef(0)); 505 if (insn->defExists(0) && insn->getDef(0)->reg.file == FILE_ADDRESS) 570 tid = bld.mkMov(bld.getScratch(), arg, TYPE_U32)->getDef(0); 662 bld.mkCvt(OP_CVT, TYPE_U8, flags, TYPE_U32, cond->getDef(0)) [all...] |
nv50_ir_peephole.cpp | 51 if (!getDef(0)->equals(getSrc(0))) 70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0) 106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) { 218 if (ld->getDef(0)->refCount() == 0) 577 mul2->def(0).replace(mul1->getDef(0), false); 583 mul2->def(0).replace(mul1->getDef(0), false); 591 if (mul2->getDef(0)->refCount() == 1 && !mul2->saturate) { 595 insn = mul2->getDef(0)->uses.front()->getInsn(); 600 s2 = insn->getSrc(0) == mul1->getDef(0) ? 0 : 1 [all...] |
nv50_ir_ra.cpp | 373 mov->setDef(0, new_LValue(func, phi->getDef(0)->asLValue())); 374 phi->setSrc(j, mov->getDef(0)); 412 LValue *tmp = new_LValue(func, cal->getDef(d)->asLValue()); 418 mov->setDef(0, cal->getDef(d)); 496 bb->liveSet.clr(i->getDef(d)->id); 502 bb->liveSet.clr(i->getDef(0)->id); 551 bb->liveSet.clr(i->getDef(0)->id); 572 bb->liveSet.clr(i->getDef(d)->id); 573 if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs 574 i->getDef(d)->livei.extend(i->serial, i->serial) [all...] |
nv50_ir.cpp | 743 i->setDef(d, pol.get(getDef(d))); 768 if (getDef(i)->reg.file != getDef(d)->reg.file) 842 if (getDef(d)->inFile(FILE_PREDICATE) || getDef(d)->inFile(FILE_FLAGS)) 852 if (a->getDef(d)->interfers(b->getSrc(s))) 862 if (a->getDef(d)->interfers(b->getDef(c)))
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nv50_ir_build_util.cpp | 188 insn->getDef(0)->reg.data.id = id; 289 val = mkMov(getSSA(halfSize * 2), val, fTy)->getDef(0);
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nv50_ir_ssa.cpp | 249 assigned.set(i->getDef(d)->id); 281 bb->defSet.set(i->getDef(d)->id);
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/external/llvm/utils/TableGen/ |
CodeGenInstruction.cpp | 36 if (Init->getDef()->getName() != "outs") 45 if (Init->getDef()->getName() != "ins") 67 Record *Rec = Arg->getDef(); 84 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops") 439 Record *ResultRecord = ADI ? ADI->getDef() : nullptr; 441 if (ADI && ADI->getDef() == InstOpRec) { 456 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) 457 ADI = ADI->getDef()->getValueAsDef("RegClass")->getDefInit(); 459 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) { 463 .hasSubClass(&T.getRegisterClass(ADI->getDef()))) [all...] |
PseudoLoweringEmitter.cpp | 81 if (DI->getDef()->isSubClassOf("Register") || 82 DI->getDef()->getName() == "zero_reg") { 84 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); 93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) 95 "Pseudo operand type '" + DI->getDef()->getName() + 135 Record *Operator = OpDef->getDef();
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OptParserEmitter.cpp | 181 OS << getOptionName(*DI->getDef()); 225 OS << getOptionName(*DI->getDef()); 232 OS << getOptionName(*DI->getDef()); 260 OS << cast<DefInit>(LI->getElement(i))->getDef()->getName();
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CodeGenDAGPatterns.cpp | 787 Record *Def = Pred->getDef(); 912 !static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef() 918 getValueType(static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef()); [all...] |
/external/clang/utils/TableGen/ |
ClangSACheckersEmitter.cpp | 33 return isHidden(*DI->getDef()); 47 name = getPackageFullName(DI->getDef()); 135 package = DI->getDef(); 156 Record *parentPackage = DI->getDef(); 162 recordGroupMap[DI->getDef()]->Checkers.insert(R); 169 addPackageToCheckerGroup(packages[i], DI->getDef(), recordGroupMap); 210 OS << groupToSortIndex[DI->getDef()] << ", "; 238 OS << groupToSortIndex[DI->getDef()] << ", ";
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ClangDiagnosticsEmitter.cpp | 86 std::string CatName = getCategoryFromDiagGroup(Group->getDef(), 177 std::string GroupName = DI->getDef()->getValueAsString("GroupName"); 233 const Record *NextDiagGroup = GroupInit->getDef(); 264 const Record *NextDiagGroup = GroupInit->getDef(); 277 SrcMgr.PrintMessage(GroupInit->getDef()->getLoc().front(), 405 const Record *GroupRec = Group->getDef(); 424 if (groupInPedantic(Group->getDef())) 521 const Record *GroupRec = Group->getDef(); 553 DiagsInGroup.find(DI->getDef()->getValueAsString("GroupName")); [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
nv50_ir_lowering_nvc0.cpp | 64 def[0] = bld.mkMovToReg(0, i->getSrc(0))->getDef(0); 65 def[1] = bld.mkMovToReg(1, i->getSrc(1))->getDef(0); 73 bld.mkMov(i->getDef(0), def[(i->op == OP_DIV) ? 0 : 1]); 204 while (insn->op == OP_MOV && insn->getDef(0)->equals(insn->getSrc(0))) 236 Value *v = insn->getDef(d); 256 if (usei->op == OP_MOV && usei->getDef(0)->equals(usei->getSrc(0)) && 360 prev->setSrc(prev->srcCount(), useVec[i].tex->getDef(0)); 366 bar->setSrc(bar->srcCount(), useVec[i].tex->getDef(0)); 556 if (!i->getDef(0)->refCount()) 789 mov = bld.mkMov(def[c][l], tex->getDef(c)) [all...] |
/external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
nv50_ir_lowering_nvc0.cpp | 64 def[0] = bld.mkMovToReg(0, i->getSrc(0))->getDef(0); 65 def[1] = bld.mkMovToReg(1, i->getSrc(1))->getDef(0); 73 bld.mkMov(i->getDef(0), def[(i->op == OP_DIV) ? 0 : 1]); 204 while (insn->op == OP_MOV && insn->getDef(0)->equals(insn->getSrc(0))) 236 Value *v = insn->getDef(d); 256 if (usei->op == OP_MOV && usei->getDef(0)->equals(usei->getSrc(0)) && 360 prev->setSrc(prev->srcCount(), useVec[i].tex->getDef(0)); 366 bar->setSrc(bar->srcCount(), useVec[i].tex->getDef(0)); 556 if (!i->getDef(0)->refCount()) 789 mov = bld.mkMov(def[c][l], tex->getDef(c)) [all...] |
/external/llvm/lib/TableGen/ |
SetTheory.cpp | 204 cast<DefInit>(Expr->getOperator())->getDef()->getRecords(); 215 Record *Rec = Records.getDef(OS.str()); 275 if (const RecVec *Result = expand(Def->getDef())) 277 Elts.insert(Def->getDef()); 292 Operator *Op = Operators.lookup(OpInit->getDef()->getName());
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Record.cpp | 344 if (!DI->getDef()->isSubClassOf(Rec)) 665 return DI->getDef(); 759 return StringInit::get(LHSd->getDef()->getName()); 803 if (Record *D = (CurRec->getRecords()).getDef(Name)) 899 if (!LOp || !ROp || LOp->getDef() != ROp->getDef()) [all...] |
/external/llvm/lib/Analysis/ |
MemoryDependenceAnalysis.cpp | 230 return MemDepResult::getDef(Inst); 400 return MemDepResult::getDef(II); 437 return MemDepResult::getDef(Inst); 464 return MemDepResult::getDef(Inst); 489 return MemDepResult::getDef(Inst); 508 return MemDepResult::getDef(Inst); [all...] |
/external/llvm/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 104 static MemDepResult getDef(Instruction *Inst) {
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/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.cpp | 418 static MachineInstr *getDef(unsigned Reg, 446 MachineInstr *RLL = getDef(SrcReg, MRI); 449 RLL = getDef(LGFR->getOperand(1).getReg(), MRI); 454 MachineInstr *SRL = getDef(RLL->getOperand(1).getReg(), MRI); 458 MachineInstr *IPM = getDef(SRL->getOperand(1).getReg(), MRI); [all...] |