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    Searched refs:getRegMask (Results 1 - 17 of 17) sorted by null

  /external/llvm/lib/CodeGen/
DeadMachineInstructionElim.cpp 160 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
RegisterScavenging.cpp 130 (isPred ? DefRegs : KillRegs).setBitsNotInMask(MO.getRegMask());
311 Candidates.clearBitsNotInMask(MO.getRegMask());
VirtRegMap.cpp 325 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
MachineInstr.cpp 203 return getRegMask() == Other.getRegMask();
247 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask());
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RegAllocFast.cpp     [all...]
LiveIntervalAnalysis.cpp 216 RegMaskBits.push_back(MO->getRegMask());
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MachineLICM.cpp 431 PhysRegClobbers.setBitsNotInMask(MO.getRegMask());
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MachineVerifier.cpp     [all...]
ScheduleDAGInstrs.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
MachineOperand.h 479 return clobbersPhysReg(getRegMask(), PhysReg);
482 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
484 const uint32_t *getRegMask() const {
SelectionDAGNodes.h     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64A57FPLoadBalancing.cpp 485 AvailableRegs.clearBitsNotInMask(J.getRegMask());
AArch64CollectLOH.cpp 327 const uint32_t *PreservedRegs = MO.getRegMask();
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AArch64LoadStoreOptimizer.cpp 345 ModifiedRegs.setBitsNotInMask(MO.getRegMask());
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  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 389 MIB.addRegMask(RM->getRegMask());
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ScheduleDAGRRList.cpp     [all...]
SelectionDAG.cpp 445 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
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