| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 762 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask));
816 DAG.getVectorShuffle(SrcVT, DL, Zero, Src, ShuffleMask));
837 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT),
[all...] |
| LegalizeDAG.cpp | 199 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
213 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
642 return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVec,
[all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 536 /// getVectorShuffle - Return an ISD::VECTOR_SHUFFLE node. The number of
540 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2,
542 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2,
546 return getVectorShuffle(VT, dl, N1, N2, MaskElts.data());
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
