| /external/llvm/include/llvm/MC/ |
| MCInstrAnalysis.h | 34 virtual bool isBranch(const MCInst &Inst) const {
35 return Info->get(Inst.getOpcode()).isBranch();
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| MCInstrDesc.h | 257 bool isBranch() const {
272 return isBranch() & !isBarrier() & !isIndirectBranch();
280 return isBranch() & isBarrier() & !isIndirectBranch();
287 if (isBranch() || isCall() || isReturn() || isIndirectBranch())
387 /// 3. Calling, branching, returning: use isCall/isReturn/isBranch.
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| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 191 /// @param isBranch - If the instruction is a branch instruction
201 /// returns zero and isBranch is true then a symbol look up for immediate Value
205 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
209 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
295 bool isBranch = false;
298 isBranch = true;
368 isBranch = true;
375 isBranch = true;
385 if(!tryAddingSymbolicOperand(immediate + pcrel, isBranch, insn.startLocation,
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| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 61 if (!MCID->isBranch())
178 if (CurSlots == 5 || (MCID->isBranch() && CurBranches == 1)) {
199 if (MCID->isBranch())
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| PPCInstrInfo.cpp | 130 if (UseMI->isBranch() && IsRegCR) {
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 165 if (MI->isBranch() && !MI->isBarrier())
192 if (!I->isBranch())
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 425 /// isBranch - Returns true if this is a conditional, unconditional, or
429 bool isBranch(QueryType Type = AnyInBundle) const {
444 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type);
452 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
| lp_bld_debug.cpp | 359 if (TID.isBranch()) {
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| /external/llvm/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 204 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
|
| ARMConstantIslandPass.cpp | 626 if (I->isBranch() && I->getOpcode() == ARM::t2BR_JT)
669 if (I->isBranch()) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 119 bool isBranch(const MachineInstr *MI) const;
|
| HexagonVLIWPacketizer.cpp | [all...] |
| HexagonInstrInfo.cpp | 624 bool HexagonInstrInfo::isBranch (const MachineInstr *MI) const {
625 return MI->getDesc().isBranch();
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 225 bool isBranch : 1;
|
| InstrInfoEmitter.cpp | 481 if (Inst.isBranch) OS << "|(1<<MCID::Branch)";
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_debug.cpp | 359 if (TID.isBranch()) {
|
| /external/llvm/lib/MC/MCAnalysis/ |
| MCObjectDisassembler.cpp | 247 if (MIA.isBranch(LI.Inst)) {
410 if (MIA.isBranch(TA->back().Inst)) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 303 if (MI.isBranch()) {
545 assert((!I->isCall() && !I->isReturn() && !I->isBranch()) &&
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| MipsCodeEmitter.cpp | 180 && MI.isBranch())
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 360 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
365 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
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| /external/llvm/lib/CodeGen/ |
| IfConversion.cpp | 596 if (!TIE->isBranch())
601 if (!FIE->isBranch())
[all...] |
| TwoAddressInstructionPass.cpp | 780 KillMI->isBranch() || KillMI->isTerminator())
839 OtherMI->isBranch() || OtherMI->isTerminator())
[all...] |
| BranchFolding.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 148 if (!I->isBranch())
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 263 if (!I->isBranch())
342 if (!I->isBranch())
[all...] |
