| /external/llvm/test/MC/Mips/ |
| elf-relsym.s | 56 ldc1 $f0, %lo($CPI0_0)($2)
58 ldc1 $f2, 0($2)
60 ldc1 $f4, %lo($CPI0_1)($3)
64 ldc1 $f0, 0($1)
|
| mips-expansions.s | 38 # CHECK: ldc1 $f0, %lo(symbol)($1)
60 ldc1 $f0, symbol
|
| nacl-mask.s | 50 ldc1 $f2, 0($7)
85 # CHECK-NEXT: ldc1 $f2, 0($7)
|
| micromips-fpu-instructions.s | 21 # CHECK-EL: ldc1 $f2, 4($6) # encoding: [0x46,0xbc,0x04,0x00]
84 # CHECK-EB: ldc1 $f2, 4($6) # encoding: [0xbc,0x46,0x00,0x04]
145 ldc1 $f2, 4($6)
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2-wrong-error.s | 9 ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips3-wrong-error.s | 10 ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips4-wrong-error.s | 10 ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/chromium_org/v8/src/mips64/ |
| lithium-gap-resolver-mips64.cc | 154 __ ldc1(kLithiumScratchDouble, cgen_->ToMemOperand(source));
215 __ ldc1(kLithiumScratchDouble, source_operand);
270 __ ldc1(cgen_->ToDoubleRegister(destination), source_operand);
286 __ ldc1(kLithiumScratchDouble, source_operand);
|
| codegen-mips64.cc | [all...] |
| deoptimizer-mips64.cc | 221 __ ldc1(f0, MemOperand(sp, src_offset));
289 __ ldc1(fpu_reg, MemOperand(a1, src_offset));
|
| /external/chromium_org/v8/src/mips/ |
| lithium-gap-resolver-mips.cc | 154 __ ldc1(kLithiumScratchDouble, cgen_->ToMemOperand(source));
269 __ ldc1(cgen_->ToDoubleRegister(destination), source_operand);
285 __ ldc1(kLithiumScratchDouble, source_operand);
|
| deoptimizer-mips.cc | 216 __ ldc1(f0, MemOperand(sp, src_offset));
285 __ ldc1(fpu_reg, MemOperand(a1, src_offset));
|
| codegen-mips.cc | [all...] |
| lithium-codegen-mips.cc | 117 __ ldc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()),
487 __ ldc1(dbl_scratch, mem_op);
[all...] |
| disasm-mips.cc | [all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips64.cc | 283 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
284 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
309 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, h)) );
310 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, i)) );
365 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)));
366 __ ldc1(f5, MemOperand(a0, OFFSET_OF(T, b)));
385 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, d)));
433 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
434 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
572 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) )
[all...] |
| test-assembler-mips.cc | 271 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
272 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
297 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, h)) );
298 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, i)) );
350 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
351 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
418 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
419 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
567 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
568 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) )
[all...] |
| test-code-stubs-mips.cc | 91 __ ldc1(f12, MemOperand(source_reg));
|
| test-code-stubs-mips64.cc | 91 __ ldc1(f12, MemOperand(source_reg));
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 47 ldc1 $f11,16391($s0)
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 54 ldc1 $f11,16391($s0)
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 61 ldc1 $f11,16391($s0)
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 96 ldc1 $f11,16391($s0)
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 98 ldc1 $f11,16391($s0)
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 98 ldc1 $f11,16391($s0)
|
