| /external/openssl/crypto/bn/asm/ |
| mips-mont.S | 54 mflo $10
57 mflo $23
60 mflo $16
64 mflo $24
70 mflo $18
90 mflo $16
100 mflo $18
137 mflo $10
143 mflo $23
146 mflo $1
[all...] |
| bn-mips.S | 40 mflo $1
53 mflo $1
67 mflo $1
80 mflo $1
101 mflo $1
116 mflo $1
130 mflo $1
169 mflo $1
180 mflo $1
188 mflo $
[all...] |
| mips.pl | 157 mflo $at
170 mflo $at
184 mflo $at
197 mflo $at
218 mflo $at
233 mflo $at
247 mflo $at
310 mflo $at
321 mflo $at
329 mflo $a
[all...] |
| mips3.s | 92 mflo AT
105 mflo AT
119 mflo AT
132 mflo AT
156 mflo AT
171 mflo AT
185 mflo AT
215 mflo AT
226 mflo AT
234 mflo A
[all...] |
| mips3-mont.pl | 97 mflo $lo0
100 mflo $m1
103 mflo $alo
107 mflo $lo1
113 mflo $nlo
133 mflo $alo
143 mflo $nlo
180 mflo $lo0
186 mflo $m1
189 mflo $al
[all...] |
| mips-mont.pl | 182 mflo $lo0
185 mflo $m1
188 mflo $alo
192 mflo $lo1
198 mflo $nlo
218 mflo $alo
228 mflo $nlo
265 mflo $lo0
271 mflo $m1
274 mflo $al
[all...] |
| /external/llvm/test/MC/Mips/ |
| micromips-16-bit-instructions.s | 13 # CHECK-EL: mflo $9 # encoding: [0x49,0x46]
20 # CHECK-EB: mflo $9 # encoding: [0x46,0x49]
25 mflo $9
|
| elf-gprel-32-64.s | 52 mflo $3
|
| mips-dsp-instructions.s | 36 # CHECK: mflo $15, $ac0 # encoding: [0x00,0x00,0x78,0x12]
47 # CHECK: mflo $15 # encoding: [0x00,0x00,0x78,0x12]
84 mflo $15, $ac0
95 mflo $15
|
| do_switch3.s | 44 mflo $2
|
| mips-fpu-instructions.s | 148 # CHECK: mflo $5 # encoding: [0x12,0x28,0x00,0x00]
183 mflo $a1
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips1.s | 15 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 11 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips.cc | 415 COMPARE(mflo(a0),
416 "00002012 mflo a0");
417 COMPARE(mflo(s2),
418 "00009012 mflo s2");
419 COMPARE(mflo(t4),
420 "00006012 mflo t4");
421 COMPARE(mflo(v1),
422 "00001812 mflo v1");
|
| test-disasm-mips64.cc | 568 COMPARE(mflo(a0),
569 "00002012 mflo a0");
570 COMPARE(mflo(s2),
571 "00009012 mflo s2");
572 COMPARE(mflo(t0),
573 "00006012 mflo t0");
574 COMPARE(mflo(v1),
575 "00001812 mflo v1");
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips1.s | 18 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 14 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 16 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 25 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/pixman/pixman/ |
| pixman-mips-dspr2-asm.h | 683 mflo \blue, $ac0
695 mflo \green, $ac1
702 mflo \red, $ac2
703 mflo \alpha, $ac3
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 56 mflo $s1
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 64 mflo $s1
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 74 mflo $s1
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 87 mflo $s1
|
| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 688 case MFLO:
689 Format(instr, "mflo 'rd");
[all...] |
