| /external/wpa_supplicant_8/src/crypto/ |
| aes_i.h | 70 static inline u32 rotr(u32 val, int bits) function
76 #define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
77 #define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
78 #define TE3(i) rotr(Te0[(i) & 0xff], 24)
94 #define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
95 #define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
96 #define TD3(i) rotr(Td0[(i) & 0xff], 24)
102 #define TD1_(i) rotr(Td0[(i) & 0xff], 8)
103 #define TD2_(i) rotr(Td0[(i) & 0xff], 16)
104 #define TD3_(i) rotr(Td0[(i) & 0xff], 24
[all...] |
| /ndk/tests/build/issue17144-byteswap/ |
| build.sh | 50 grep -w rotr issue17144-byteswap.s | grep -qw rotr
51 fail_panic "mips doesn't use wsbh/rotr instruciton for __swap32()"
|
| /external/llvm/test/MC/Mips/ |
| micromips-shift-instructions.s | 16 # CHECK-EL: rotr $9, $6, 7 # encoding: [0x26,0x01,0xc0,0x38]
27 # CHECK-EB: rotr $9, $6, 7 # encoding: [0x01,0x26,0x38,0xc0]
35 rotr $9, $6, 7
|
| mips-alu-instructions.s | 19 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
50 rotr $9, $6, 7
|
| mips64-alu-instructions.s | 17 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
45 rotr $9, $6, 7
|
| /external/openssl/crypto/des/asm/ |
| crypt586.pl | 109 &rotr( $t, 4 );
174 { &rotr($tt, 3-$lr); }
180 { &rotr($r, 2-$lr); }
193 else { &rotr($r, $lr-2); }
199 else { &rotr($l, $lr-3); }
207 &rotr($tt , 4);
|
| des-586.pl | 187 &rotr($L,3); # r
189 &rotr($R,3); # l
217 &rotr( $t, 4 );
279 { &rotr($tt, 3-$lr); }
285 { &rotr($r, 2-$lr); }
298 else { &rotr($r, $lr-2); }
304 else { &rotr($l, $lr-3); }
312 &rotr($tt , 4);
|
| /external/chromium_org/third_party/skia/bench/ |
| FontCacheBench.cpp | 57 static uint32_t rotr(uint32_t value, unsigned bits) { function
104 if (false) rotr(0, 0);
|
| /external/skia/bench/ |
| FontCacheBench.cpp | 56 static uint32_t rotr(uint32_t value, unsigned bits) { function
114 if (false) rotr(0, 0);
|
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 158 EXPECT_EQ(one, one.rotr(0));
159 EXPECT_EQ(one, one.rotr(1));
508 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(0));
509 EXPECT_EQ(APInt(8, 8), APInt(8, 16).rotr(1));
510 EXPECT_EQ(APInt(8, 4), APInt(8, 16).rotr(2));
511 EXPECT_EQ(APInt(8, 1), APInt(8, 16).rotr(4));
512 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(8));
514 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotr(0));
515 EXPECT_EQ(APInt(8, 128), APInt(8, 1).rotr(1));
516 EXPECT_EQ(APInt(8, 64), APInt(8, 1).rotr(2))
[all...] |
| /external/openssl/crypto/bf/asm/ |
| bf-686.pl | 95 &rotr( $R, 16);
101 &rotr( $R, 16);
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 24 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
25 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 26 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/third_party/boringssl/src/crypto/perlasm/ |
| cbc.pl | 283 &rotr("edx", 16);
294 &rotr("ecx", 16);
|
| x86asm.pl | 65 sub ::rotr { &ror(@_); }
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 136 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
137 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
|
| /external/openssl/crypto/perlasm/ |
| cbc.pl | 283 &rotr("edx", 16);
294 &rotr("ecx", 16);
|
| x86asm.pl | 65 sub ::rotr { &ror(@_); }
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips.cc | 356 COMPARE(rotr(a0, a1, 0),
357 "00252002 rotr a0, a1, 0");
358 COMPARE(rotr(s0, s1, 8),
359 "00318202 rotr s0, s1, 8");
360 COMPARE(rotr(t2, t3, 24),
361 "002b5602 rotr t2, t3, 24");
362 COMPARE(rotr(v0, v1, 31),
363 "002317c2 rotr v0, v1, 31");
|
| test-disasm-mips64.cc | 493 COMPARE(rotr(a0, a1, 0),
494 "00252002 rotr a0, a1, 0");
495 COMPARE(rotr(s0, s1, 8),
496 "00318202 rotr s0, s1, 8");
497 COMPARE(rotr(a6, a7, 24),
498 "002b5602 rotr a6, a7, 24");
499 COMPARE(rotr(v0, v1, 31),
500 "002317c2 rotr v0, v1, 31");
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 38 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
39 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/third_party/boringssl/src/crypto/sha/asm/ |
| sha1-586.pl | 169 &rotr($b,2); # b=ROTATE(b,30)
196 &rotr($b,$n==16?2:7); # b=ROTATE(b,30)
213 &rotr($b,2); # b=ROTATE(b,30)
238 &rotr($b,7); # b=ROTATE(b,30)
246 &rotr($a,5) if ($n==79);
256 &rotr($b,2); # b=ROTATE(b,30)
281 &rotr($b,7); # b=ROTATE(b,30)
300 &rotr($b,2); # b=ROTATE(b,30)
[all...] |
| /external/linux-tools-perf/perf-3.12.0/arch/ia64/lib/ |
| memcpy.S | 92 .rotr val[N]
234 .rotr val[N+1], w[2]
|
| /external/openssl/crypto/sha/asm/ |
| sha1-586.pl | 152 &rotr($b,2); # b=ROTATE(b,30)
179 &rotr($b,$n==16?2:7); # b=ROTATE(b,30)
196 &rotr($b,2); # b=ROTATE(b,30)
221 &rotr($b,7); # b=ROTATE(b,30)
229 &rotr($a,5) if ($n==79);
239 &rotr($b,2); # b=ROTATE(b,30)
264 &rotr($b,7); # b=ROTATE(b,30)
283 &rotr($b,2); # b=ROTATE(b,30)
[all...] |
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 194 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
195 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
|
