/external/libunwind/src/ia64/ |
getcontext.S | 51 st8.spill [r2] = r1, (SC_FLAGS - GR(1)) // M3 66 st8.spill [r2] = r12, (GR(4) - GR(12)) // M3 70 stf.spill [r3] = f2 // M2 71 stf.spill [r8] = f16 // M3 76 stf.spill [r9] = f24, (FR(31) - FR(24)) // M2 80 stf.spill [r9] = f31 // M2 81 st8.spill [r2] = r4, (GR(5) - GR(4)) // M3, bank 1 85 .mem.offset 0,0; st8.spill [r2] = r5, (GR(6) - GR(5)) // M4, bank 0 86 .mem.offset 8,0; st8.spill [r3] = r7, (BR(0) - GR(7)) // M3, bank 0 90 st8.spill [r2] = r6, (BR(1) - GR(6)) // M2, bank [all...] |
/external/oprofile/module/ia64/ |
IA64minstate.h | 192 st8.spill [r17]=rR1, 16; /* save original r1 */ \ 194 .mem.offset 0, 0; st8.spill [r16]=r2, 16; \ 195 .mem.offset 8, 0; st8.spill [r17]=r3, 16; \ 198 .mem.offset 0, 0; st8.spill [r16]=r12, 16; \ 199 .mem.offset 8, 0; st8.spill [r17]=r13, 16; \ 203 .mem.offset 0, 0; st8.spill [r16]=r14, 16; \ 204 .mem.offset 8, 0; st8.spill [r17]=r15, 16; \ 207 .mem.offset 0, 0; st8.spill [r16]=r8, 16; \ 208 .mem.offset 8, 0; st8.spill [r17]=r9, 16; \ 212 .mem.offset 0, 0; st8.spill [r16]=r10, 16; [all...] |
oprofile_stubs.S | 95 stf.spill [sp]=f0
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/external/llvm/lib/CodeGen/ |
Spiller.h | 22 /// Implementations are utility classes which insert spill or remat code on 29 /// spill - Spill the LRE.getParent() live interval. 30 virtual void spill(LiveRangeEdit &LRE) = 0; 39 /// Create and return a spiller that will insert spill code directly instead
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RegAllocBasic.cpp | 58 /// algorithm. It prioritizes live virtual registers by spill weight and spills 164 // Spill or split all live virtual registers currently unified under PhysReg 190 // Spill each interfering vreg allocated to PhysReg or an alias. 192 LiveInterval &Spill = *Intfs[i]; 195 if (!VRM->hasPhys(Spill.reg)) 200 Matrix->unassign(Spill); 202 // Spill the extracted interval. 203 LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM); 204 spiller().spill(LRE); 223 // Populate a list of physical register spill candidates [all...] |
Spiller.cpp | 72 /// Add spill ranges for every use/def of the live interval, inserting loads 81 "Attempting to spill already spilled value."); 84 "Trying to spill a stack slot."); 86 DEBUG(dbgs() << "Trivial spill everywhere of reg" << li->reg << "\n"); 157 /// Spills any live range using the spill-everywhere method with no attempt at 166 void spill(LiveRangeEdit &LRE) override {
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/art/compiler/utils/ |
managed_register.h | 115 ManagedRegisterSpill spill(__x); 116 std::vector<ManagedRegisterSpill>::push_back(spill); 120 ManagedRegisterSpill spill(__x, __size); 121 std::vector<ManagedRegisterSpill>::push_back(spill);
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/art/runtime/arch/arm/ |
jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
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portable_entrypoints_arm.S | 30 push {r0, r4, r5, r9, r11, lr} @ spill regs 61 pop {r0, r4, r5, r9, r11, lr} @ restore spill regs
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/external/linux-tools-perf/perf-3.12.0/arch/ia64/lib/ |
memset.S | 17 Since a stf.spill f0 can store 16B in one go, we use this instruction 66 cmp.ne p_nz, p_zr = value, r0 // use stf.spill if value is zero 125 (p_zr) br.cond.dptk.many .l1b // Jump to use stf.spill 218 stf.spill [ptr9] = f0, 128 // Do stores one cache line apart 228 stf.spill [ptr2] = f0, 32 229 stf.spill [ptr0] = f0, 32 232 stf.spill [ptr2] = f0, 32 233 stf.spill [ptr0] = f0, 32 236 stf.spill [ptr2] = f0, 32 237 stf.spill [ptr0] = f0, 6 [all...] |
/external/llvm/lib/Target/X86/ |
X86CompilationCallback_Win64.asm | 24 ; WARNING: We cannot use register spill area - we're generating stubs by hands! 33 ; Save all XMM arg registers. Also allocate reg spill area.
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/external/chromium_org/v8/test/mjsunit/regress/ |
regress-crbug-173907b.js | 36 %NeverOptimizeFunction(spill); 37 function spill() { function 45 spill(); // At this point initial values for phi1 and phi2 are spilled.
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regress-crbug-173907.js | 36 function spill() { function 45 spill(); // At this point initial values for phi1 and phi2 are spilled.
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/external/libunwind/tests/ |
ia64-test-nat-asm.S | 108 stf.spill [sp] = f2, -16 172 /* Spill r4 into memory and then save r5 in r4. */ 188 st8.spill [sp] = r4, -16 209 /* Spill r6 into memory and save primary ar.unat in a register. */ 225 st8.spill [sp] = r6, -16;; 246 /* Spill r6 into memory and save primary ar.unat in memory. */ 263 st8.spill [sp] = r6, -16;; 287 /* Spill r6 into memory and save primary ar.unat in register, 305 st8.spill [sp] = r6, -16;; 330 /* Spill r6 into memory and save primary ar.unat in register [all...] |
/art/compiler/utils/x86_64/ |
assembler_x86_64.cc | 1725 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local 1739 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local 1751 ManagedRegisterSpill spill = entry_spills.at(i); local 1778 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local 1788 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local [all...] |
assembler_x86_64_test.cc | 238 // TODO: more interesting spill registers / entry spills. 240 // Two random spill regs. 247 ManagedRegisterSpill spill(ManagedFromCpu(x86_64::RAX), 8, 0); 248 entry_spills.push_back(spill); 282 // TODO: more interesting spill registers / entry spills. 284 // Two random spill regs. 297 // 2) Pop spill regs.
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/external/chromium_org/v8/test/mjsunit/ |
codegen-coverage.js | 53 // The call will spill registers and leave x in {eax,rax}. 55 // The add will spill x and reuse {eax,rax} for the result.
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/art/compiler/jni/quick/x86_64/ |
calling_convention_x86_64.cc | 104 // We spill the argument registers on X86 to free them up for scratch use, we then assume 113 ManagedRegisterSpill spill(in_reg, size, spill_offset); 114 entry_spills_.push_back(spill); 154 // Plus return value spill area size
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/external/openssl/crypto/bn/asm/ |
ia64-mont.pl | 389 stf.spill [sp]=f16,-16 391 stf.spill [r17]=f17,32 394 stf.spill [r16]=f18,32 396 stf.spill [r17]=f19,32 399 stf.spill [r16]=f20,32 401 stf.spill [r17]=f21,32 404 stf.spill [r16]=f22 406 stf.spill [r17]=f23
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/system/core/libpixelflinger/codeflinger/ |
texturing.cpp | 387 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0]); 388 CONTEXT_STORE(t.reg, generated_vars.texture[i].spill[1]); 411 // We don't have a way to spill registers automatically 412 // spill depth and AA regs, when we know we may have to. 413 // build the spill list... 437 Spill spill(registerFile(), *this, spill_list); 463 CONTEXT_LOAD(s.reg, generated_vars.texture[i].spill[0]); 464 CONTEXT_LOAD(t.reg, generated_vars.texture[i].spill[1]); 614 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0]) [all...] |
/external/chromium_org/v8/test/webkit/ |
dfg-weak-js-constant-silent-fill.js | 25 "Tests that DFG silent spill and fill of WeakJSConstants does not result in nonsense."
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/system/core/include/private/pixelflinger/ |
ggl_context.h | 488 int32_t spill[2]; member in struct:android::generated_tex_vars_t 501 int32_t spill[3]; member in struct:android::generated_vars_t
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
nv50_ir_ra.cpp | 285 void spill(Instruction *defi, Value *slot, LValue *); 707 SpillCodeInserter& spill; member in class:nv50_ir::GCRA 993 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : 996 spill(spill) 1153 (node->degree < node->degreeLimit) ? "" : "(spill)"); 1171 // spill candidate 1180 ERROR("no viable spill candidates left\n"); 1436 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter [all...] |
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_ra.cpp | 285 void spill(Instruction *defi, Value *slot, LValue *); 707 SpillCodeInserter& spill; member in class:nv50_ir::GCRA 993 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : 996 spill(spill) 1153 (node->degree < node->degreeLimit) ? "" : "(spill)"); 1171 // spill candidate 1180 ERROR("no viable spill candidates left\n"); 1436 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter [all...] |
/prebuilts/python/darwin-x86/2.7.5/lib/python2.7/ |
pydoc.py | 737 def spill(msg, attrs, predicate): function in function:.docclass 1170 def spill(msg, attrs, predicate): function in function:TextDoc.docclass [all...] |