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  /external/oprofile/events/mips/sb1/
events 22 # Explaining Sub-Peak Performance: static and dynamic stalls
56 event:0x11 counters:1,2,3 um:zero minimum:500 name:BIU_STALLS_ON_ZB_ADDR_BUS :BIU stalls on ZB addr bus
57 event:0x12 counters:1,2,3 um:zero minimum:500 name:BIU_STALLS_ON_ZB_DATA_BUS :BIU stalls on ZB data bus
  /external/oprofile/events/i386/nehalem/
events 38 event:0x1E counters:0,1,2,3 um:one minimum:6000 name:INST_QUEUE_WRITE_CYCLES : This event counts the number of cycles during which instructions are written to the instruction queue. Dividing this counter by the number of instructions written to the instruction queue (INST_QUEUE_WRITES) yields the average number of instructions decoded each cycle. If this number is less than four and the pipe stalls, this indicates that the decoder is failing to decode enough instructions per cycle to sustain the 4-wide pipeline.
67 event:0x87 counters:0,1,2,3 um:ild_stall minimum:6000 name:ILD_STALL : Cycles Instruction Length Decoder stalls
70 event:0xA2 counters:0,1,2,3 um:resource_stalls minimum:6000 name:RESOURCE_STALLS : Counts the number of Allocator resource related stalls. Includes register renaming buffer entries, memory buffer entries. In addition to resource related stalls, this event counts some other events. Includes stalls arising during branch misprediction recovery, such as if retirement of the mispredicted branch is delayed and stalls arising while store buffer is draining from synchronizing operations.
unit_masks 189 0x04 cycles_stalled Cycle counts for which an instruction fetch stalls due to a L1I cache miss, ITLB miss or ITLB fault
205 0x01 lcp Cycles Instruction Length Decoder stalls due to length changing prefixes: 66, 67 or REX
208 0x08 regen Counts the number of regen stalls
233 0x01 any Counts the number of Allocator resource related stalls
239 0x40 mxcsr Stalls due to the MXCSR register rename occurring to close to a previous MXCSR rename
317 0x04 rob_read_port Counts the number of cycles when ROB read port stalls occurred, which did not allow new micro-ops to enter the out-of-order pipeline
319 0x0F any Counts all Register Allocation Table stall cycles due to: Cycles when ROB read port stalls occurred, which did not allow new micro-ops to enter the execution pipe
  /external/oprofile/events/x86-64/family11h/
events 98 event:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls
  /external/oprofile/events/x86-64/hammer/
events 93 event:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls
  /external/blktrace/btreplay/doc/
btreplay.tex 394 [ -N : --no-stalls ] Default: Off
494 \subsubsection{\label{sec:o-N}\texttt{-N} or \texttt{--no-stalls}\\Disable
495 Pre-bunch Stalls}
503 While the \texttt{--no-stalls} option allows the traces to be replayed
  /external/chromium_org/third_party/opus/src/celt/arm/
celt_pitch_xcorr_arm.s 282 ; thus "free". There should be no stalls in the body of the loop.
  /external/flac/libFLAC/ppc/as/
lpc_asm.s 54 ; I have not yet run this through simg4, so there may be some avoidable stalls,
  /external/flac/libFLAC/ppc/gas/
lpc_asm.s 56 # I have not yet run this through simg4, so there may be some avoidable stalls,
  /external/jpeg/
mips_idct_le.S 195 # stalls
  /external/libopus/celt/arm/
celt_pitch_xcorr_arm.s 282 ; thus "free". There should be no stalls in the body of the loop.
  /external/oprofile/events/mips/74K/
events 102 event:0x408 counters:1,3 um:zero minimum:500 name:PDTRACE_BACK_STALLS : 8-1 PDtrace back stalls
  /external/chromium-trace/
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