| /external/clang/test/CodeGen/ |
| const-init.c | 137 typedef long long v1i64 __attribute((vector_size(8))); typedef
143 static v1i64 a = (v1i64)10LL;
|
| x86_64-arguments.c | 235 typedef unsigned long long v1i64 __attribute__((__vector_size__(8))); typedef
239 v1i64 f34(v1i64 arg) { return arg; }
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 83 v1i64 = 37, // 1 x i64 enumerator in enum:llvm::MVT::SimpleValueType
205 SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
292 case v1i64:
354 case v1i64:
401 case v1i64:
542 if (NumElements == 1) return MVT::v1i64;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| AArch64ISelLowering.cpp | 107 addDRTypeForNEON(MVT::v1i64);
415 setOperationAction(ISD::FP_TO_SINT, MVT::v1i64, Expand);
416 setOperationAction(ISD::FP_TO_UINT, MVT::v1i64, Expand);
417 setOperationAction(ISD::SINT_TO_FP, MVT::v1i64, Expand);
418 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand);
421 setOperationAction(ISD::MUL, MVT::v1i64, Expand);
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 155 case MVT::v1i64: return "v1i64";
223 case MVT::v1i64: return VectorType::get(Type::getInt64Ty(Context), 1);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 514 { ISD::SDIV, MVT::v1i64, 1 * FunctionCallDivCost},
515 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost},
516 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
517 { ISD::UREM, MVT::v1i64, 1 * FunctionCallDivCost},
|
| ARMISelLowering.cpp | 429 addDRTypeForNEON(MVT::v1i64);
510 // Neon does not support some operations on v1i64 and v2i64 types.
511 setOperationAction(ISD::MUL, MVT::v1i64, Expand);
521 setOperationAction(ISD::SETCC, MVT::v1i64, Expand);
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 96 case MVT::v1i64: return "MVT::v1i64";
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
