/external/libhevc/common/arm64/ |
ihevc_intra_pred_chroma_ver.s | 117 ld2 {v20.8b, v21.8b}, [x6],#16 //16 loads (col 0:15) 127 st2 {v20.8b, v21.8b}, [x2],#16 128 st2 {v20.8b, v21.8b}, [x5],#16 129 st2 {v20.8b, v21.8b}, [x8],#16 130 st2 {v20.8b, v21.8b}, [x10],#16 140 st2 {v20.8b, v21.8b}, [x2],#16 141 st2 {v20.8b, v21.8b}, [x5],#16 142 st2 {v20.8b, v21.8b}, [x8],#16 143 st2 {v20.8b, v21.8b}, [x10],#16 153 st2 {v20.8b, v21.8b}, [x2],#1 [all...] |
ihevc_intra_pred_luma_dc.s | 237 uxtl v20.8h, v0.8b 240 add v20.8h, v20.8h , v24.8h //col 1::7 add 3dc+2 (prol) 243 sqshrun v2.8b, v20.8h,#2 //columns shx2 movn (prol) 263 bsl v20.8b, v3.8b , v16.8b //row 1 (prol) 268 st1 {v20.8b},[x2], x3 //store row 1 (prol) 280 bsl v20.8b, v3.8b , v16.8b //row 3 (prol) 285 st1 {v20.8b},[x2], x3 //store row 3 (prol) 296 bsl v20.8b, v3.8b , v16.8b //row 5 (prol) 301 st1 {v20.8b},[x2], x3 //store row 5 (prol [all...] |
ihevc_inter_pred_filters_luma_vert_w16inp.s | 171 smull v20.4s, v2.4h, v23.4h //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)// 174 smlal v20.4s, v1.4h, v22.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp2, coeffabs_0)// 176 smlal v20.4s, v3.4h, v24.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_2)// 178 smlal v20.4s, v4.4h, v25.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp1, coeffabs_3)// 180 smlal v20.4s, v5.4h, v26.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp2, coeffabs_4)// 182 smlal v20.4s, v6.4h, v27.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp3, coeffabs_5)// 183 smlal v20.4s, v7.4h, v28.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)// 184 smlal v20.4s, v16.4h, v29.4h //mul_res2 = vmlal_u8(mul_res2, src_tmp1, coeffabs_7)// 199 sqshrn v20.4h, v20.4s,# [all...] |
ihevc_inter_pred_luma_vert_w16inp_w16out.s | 182 smull v20.4s,v2.4h,v23.4h //mul_res2 = smull_u8(src_tmp3, coeffabs_1)// 185 smlal v20.4s,v1.4h,v22.4h //mul_res2 = smlal_u8(mul_res2, src_tmp2, coeffabs_0)// 187 smlal v20.4s,v3.4h,v24.4h //mul_res2 = smlal_u8(mul_res2, src_tmp4, coeffabs_2)// 189 smlal v20.4s,v4.4h,v25.4h //mul_res2 = smlal_u8(mul_res2, src_tmp1, coeffabs_3)// 191 smlal v20.4s,v5.4h,v26.4h //mul_res2 = smlal_u8(mul_res2, src_tmp2, coeffabs_4)// 193 smlal v20.4s,v6.4h,v27.4h //mul_res2 = smlal_u8(mul_res2, src_tmp3, coeffabs_5)// 194 smlal v20.4s,v7.4h,v28.4h //mul_res2 = smlal_u8(mul_res2, src_tmp4, coeffabs_6)// 195 smlal v20.4s,v16.4h,v29.4h //mul_res2 = smlal_u8(mul_res2, src_tmp1, coeffabs_7)// 210 sub v20.4s, v20.4s, v30.4 [all...] |
ihevc_sao_edge_offset_class1.s | 154 SUB v20.16b, v17.16b , v5.16b //sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 160 ADD v5.16b, v5.16b , v20.16b //edge_idx = vaddq_s8(edge_idx, sign_down) 163 NEG v16.16b, v20.16b //sign_up = vnegq_s8(sign_down) 177 Uxtl v20.8h, v3.8b //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 179 SADDW v20.8h, v20.8h , v5.8b //pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 181 SMAX v20.8h, v20.8h , v2.8h //pi2_tmp_cur_row.val[0] = vmaxq_s16(pi2_tmp_cur_row.val[0], const_min_clip) 183 UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16(vreinterpretq_u16_s16(pi (…) [all...] |
ihevc_sao_edge_offset_class1_chroma.s | 183 SUB v20.16b, v19.16b , v5.16b //sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 189 ADD v5.16b, v5.16b , v20.16b //edge_idx = vaddq_s8(edge_idx, sign_down) 193 NEG v16.16b, v20.16b //sign_up = vnegq_s8(sign_down) 209 Uxtl v20.8h, v3.8b //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 215 SADDW v20.8h, v20.8h , v5.8b //pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 217 SMAX v20.8h, v20.8h , v2.8h //pi2_tmp_cur_row.val[0] = vmaxq_s16(pi2_tmp_cur_row.val[0], const_min_clip) 219 UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16(vreinterpretq_u16_s16(pi (…) [all...] |
ihevc_inter_pred_filters_luma_vert.s | 182 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)// 186 umlsl v20.8h, v1.8b, v22.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp2, coeffabs_0)// 190 umlsl v20.8h, v3.8b, v24.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp4, coeffabs_2)// 193 umlal v20.8h, v4.8b, v25.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp1, coeffabs_3)// 196 umlal v20.8h, v5.8b, v26.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp2, coeffabs_4)// 199 umlsl v20.8h, v6.8b, v27.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp3, coeffabs_5)// 202 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)// 206 umlsl v20.8h, v16.8b, v29.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp1, coeffabs_7)// 224 sqrshrun v20.8b, v20.8h,#6 //sto_res = vqmovun_s16(sto_res_tmp)/ [all...] |
ihevc_itrans_recon_4x4_ttype1.s | 154 smull v20.4s, v2.4h, v4.4h[1] // 55 * pi2_src[2] 155 smlsl v20.4s, v1.4h, v4.4h[2] // 55 * pi2_src[2] - 74 * pi2_src[1] 156 smlsl v20.4s, v3.4h, v4.4h[0] // - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src[3] 157 smlal v20.4s, v0.4h, v4.4h[3] //pi2_out[3] = 84 * pi2_src[0] - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src[3] 162 sqrshrn v31.4h, v20.4s,#shift_stage1_idct // (pi2_out[3] + rounding ) >> shift_stage1_idct 198 smull v20.4s, v16.4h, v4.4h[1] // 55 * pi2_src[2] 199 smlsl v20.4s, v22.4h, v4.4h[2] // - 74 * pi2_src[1] + 55 * pi2_src[2] 200 smlsl v20.4s, v17.4h, v4.4h[0] // - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src[3] 201 smlal v20.4s, v21.4h, v4.4h[3] //pi2_out[3] = 84 * pi2_src[0] - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src[3] 206 sqrshrn v31.4h, v20.4s,#shift_stage2_idct // (pi2_out[3] + rounding ) >> shift_stage1_idc [all...] |
ihevc_intra_pred_luma_mode_3_to_9.s | 211 umull v20.8h, v14.8b, v7.8b //mul (row 2) 212 umlal v20.8h, v15.8b, v6.8b //mul (row 2) 219 rshrn v20.8b, v20.8h,#5 //round shft (row 2) 229 st1 {v20.8b},[x2], x3 //st (row 2) 255 umull v20.8h, v14.8b, v7.8b //mul (row 6) 256 umlal v20.8h, v15.8b, v6.8b //mul (row 6) 263 rshrn v20.8b, v20.8h,#5 //round shft (row 6) 266 st1 {v20.8b},[x2], x3 //st (row 6 [all...] |
ihevc_sao_edge_offset_class2.s | 329 Uxtl v20.8h, v5.8b //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 331 SADDW v20.8h, v20.8h , v3.8b //I pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 333 SMAX v20.8h, v20.8h , v2.8h //I pi2_tmp_cur_row.val[0] = vmaxq_s16(pi2_tmp_cur_row.val[0], const_min_clip) 336 UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16(vreinterpretq_u16_s16(pi2_tmp_cur_row.val[0]), const_max_clip)) 340 xtn v20.8b, v20.8h //I vmovn_s16(pi2_tmp_cur_row.val[0]) 347 xtn2 v20.16b, v22.8h //I vmovn_s16(pi2_tmp_cur_row.val[1] [all...] |
ihevc_sao_edge_offset_class3.s | 338 Uxtl v20.8h, v5.8b //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 344 SADDW v20.8h, v20.8h , v3.8b //I pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 346 SMAX v20.8h, v20.8h , v2.8h //I pi2_tmp_cur_row.val[0] = vmaxq_s16(pi2_tmp_cur_row.val[0], const_min_clip) 348 UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16(vreinterpretq_u16_s16(pi2_tmp_cur_row.val[0]), const_max_clip)) 360 xtn v20.8b, v20.8h //I vmovn_s16(pi2_tmp_cur_row.val[0]) 364 xtn2 v20.16b, v22.8h //I vmovn_s16(pi2_tmp_cur_row.val[1] [all...] |
ihevc_sao_edge_offset_class3_chroma.s | 429 cmhi v20.16b, v5.16b , v18.16b //I vcgtq_u8(pu1_cur_row, pu1_next_row_tmp) 432 SUB v22.16b, v22.16b , v20.16b //I sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 442 Uxtl v20.8h, v5.8b //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 456 SADDW v20.8h, v20.8h , v22.8b //I pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 458 SMAX v20.8h, v20.8h , v2.8h //I pi2_tmp_cur_row.val[0] = vmaxq_s16(pi2_tmp_cur_row.val[0], const_min_clip) 459 UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16(vreinterpretq_u16_s16(pi2_tmp_cur_row.val[0]), const_max_clip)) 472 xtn v20.8b, v20.8h //I vmovn_s16(pi2_tmp_cur_row.val[0] [all...] |
ihevc_inter_pred_filters_luma_vert_w16out.s | 140 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)// 144 umlsl v20.8h, v1.8b, v22.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp2, coeffabs_0)// 147 umlsl v20.8h, v3.8b, v24.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp4, coeffabs_2)// 151 umlal v20.8h, v4.8b, v25.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp1, coeffabs_3)// 154 umlal v20.8h, v5.8b, v26.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp2, coeffabs_4)// 157 umlsl v20.8h, v6.8b, v27.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp3, coeffabs_5)// 159 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)// 162 umlsl v20.8h, v16.8b, v29.8b //mul_res2 = vmlsl_u8(mul_res2, src_tmp1, coeffabs_7)// 197 st1 {v20.16b},[x14],x6 //vst1_u8(pu1_dst_tmp,sto_res)// 234 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)/ [all...] |
/external/llvm/test/MC/AArch64/ |
noneon-diagnostics.s | 5 fmla v1.2d, v30.2d, v20.2d 11 // CHECK-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d 18 fmls v1.2d, v30.2d, v20.2d 25 // CHECK-ERROR-NEXT: fmls v1.2d, v30.2d, v20.2d
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neon-simd-copy.s | 11 ins v20.s[0], w30 16 mov v20.s[0], w30 21 // CHECK: {{mov|ins}} v20.s[0], w30 // encoding: [0xd4,0x1f,0x04,0x4e] 26 // CHECK: {{mov|ins}} v20.s[0], w30 // encoding: [0xd4,0x1f,0x04,0x4e] 94 dup v17.2s, v20.s[0] 97 dup v17.4s, v20.s[0] 102 // CHECK: {{mov|dup}} v17.2s, v20.s[0] // encoding: [0x91,0x06,0x04,0x0e] 105 // CHECK: {{mov|dup}} v17.4s, v20.s[0] // encoding: [0x91,0x06,0x04,0x4e]
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/external/libhevc/decoder/arm64/ |
ihevcd_fmt_conv_420sp_to_rgba8888.s | 203 sMULL v20.4s, v6.4h, v0.4h[0] ////(V-128)*C1 FOR R 217 sqshrn v7.4h, v20.4s,#13 ////D10 = (V-128)*C1>>13 4 16-BIT VALUES 230 UADDW v20.8h, v5.8h , v31.8b ////Q10 - HAS Y + B 239 sqxtun v20.8b, v20.8h 251 ZIP1 v27.8b, v20.8b, v21.8b 252 ZIP2 v21.8b, v20.8b, v21.8b 253 mov v20.d[0], v27.d[0] 259 mov v20.d[1], v21.d[0] 266 ZIP1 v25.8h, v20.8h, v22.8 [all...] |
/external/openssl/crypto/modes/asm/ |
ghashv8-armx-64.S | 35 ld1 {v20.2d},[x1] //load twisted H 40 ext v21.16b,v20.16b,v20.16b,#8 44 eor v21.16b,v21.16b,v20.16b //Karatsuba pre-processing 57 ld1 {v20.2d},[x1] //load twisted H 62 ext v21.16b,v20.16b,v20.16b,#8 67 eor v21.16b,v21.16b,v20.16b //Karatsuba pre-processing 78 pmull v0.1q,v20.1d,v3.1d //H.lo·Xi.lo 80 pmull2 v2.1q,v20.2d,v3.2d //H.hi·Xi.h [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_advsimd_3DLUT.S | 93 .ifc \dst, v20.16b 134 1: st4 {v20.8b,v21.8b,v22.8b,v23.8b}, [x0], #32 189 lanepair dst=v20.8b, src0=v6.s[0], src1=v6.s[1], xr0=v0.h[0], xr1=v0.h[1], yr0=v1.b[0], yr1=v1.b[1], zr0=v2.h[0], zr1=v2.h[1] 192 lanepair dst=v20.16b, src0=v6.s[2], src1=v6.s[3], xr0=v0.h[2], xr1=v0.h[3], yr0=v1.b[2], yr1=v1.b[3], zr0=v2.h[2], zr1=v2.h[3] 200 uzp1 v6.16b, v20.16b, v21.16b 201 uzp2 v7.16b, v20.16b, v21.16b 202 uzp1 v20.16b, v6.16b, v7.16b 204 mov v21.d[0], v20.d[1] 214 st4 {v20.8b,v21.8b,v22.8b,v23.8b}, [x0], #32 233 st4 {v20.b-v23.b}[0], [x0], # [all...] |
rsCpuIntrinsics_advsimd_ColorMatrix.S | 221 vmxx_f32 \i, 1, v16.4s, v20.4s, v0.s[0] 235 vmxx_f32 \i^31, 1, v16.4s, v20.4s, v0.s[0] 249 vmxx_f32 \i, 1, v17.4s, v20.4s, v0.s[1] 263 vmxx_f32 \i^31, 1, v17.4s, v20.4s, v0.s[1] 277 vmxx_f32 \i, 1, v18.4s, v20.4s, v0.s[2] 291 vmxx_f32 \i^31, 1, v18.4s, v20.4s, v0.s[2] 305 vmxx_f32 \i, 1, v19.4s, v20.4s, v0.s[3] 319 vmxx_f32 \i^31, 1, v19.4s, v20.4s, v0.s[3] 330 ld4 {v20.8b,v21.8b,v22.8b,v23.8b}, [x1], #32 331 uxtl v20.8h, v20.8 [all...] |
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/ |
variance_subpixel_altivec.asm | 45 load_c v20, hfilter_b, r5, r12, r0 71 ;# v20 filter taps 94 vperm v24, v21, v21, \hp ;# v20 = 0123 1234 2345 3456 97 vmsummbm v24, v20, v24, v18 98 vmsummbm v25, v20, v25, v18 108 vmuleub v22, \P0, v20 ;# 64 + 4 positive taps 110 vmuloub v23, \P0, v20 166 compute_sum_sse \V, v16, v18, v19, v20, v21, v23 233 vspltish v20, 8 235 vslh v18, v20, v18 ;# 0x0040 0040 0040 0040 0040 0040 0040 004 [all...] |
filter_bilinear_altivec.asm | 45 load_c v20, hfilter_b, r5, r9, r0 68 ;# v20 filter taps 79 vperm v24, v21, v21, v10 ;# v20 = 0123 1234 2345 3456 82 vmsummbm v24, v20, v24, v18 83 vmsummbm v25, v20, v25, v18 132 vmuleub v22, \P0, v20 ;# 64 + 4 positive taps 134 vmuloub v23, \P0, v20 206 vspltish v20, 8 208 vslh v18, v20, v18 ;# 0x0040 0040 0040 0040 0040 0040 0040 0040 210 load_vfilter v20, v2 [all...] |
/external/libvpx/libvpx/vp8/common/ppc/ |
variance_subpixel_altivec.asm | 45 load_c v20, hfilter_b, r5, r12, r0 71 ;# v20 filter taps 94 vperm v24, v21, v21, \hp ;# v20 = 0123 1234 2345 3456 97 vmsummbm v24, v20, v24, v18 98 vmsummbm v25, v20, v25, v18 108 vmuleub v22, \P0, v20 ;# 64 + 4 positive taps 110 vmuloub v23, \P0, v20 166 compute_sum_sse \V, v16, v18, v19, v20, v21, v23 233 vspltish v20, 8 235 vslh v18, v20, v18 ;# 0x0040 0040 0040 0040 0040 0040 0040 004 [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
variance_subpixel_altivec.asm | 45 load_c v20, hfilter_b, r5, r12, r0 71 ;# v20 filter taps 94 vperm v24, v21, v21, \hp ;# v20 = 0123 1234 2345 3456 97 vmsummbm v24, v20, v24, v18 98 vmsummbm v25, v20, v25, v18 108 vmuleub v22, \P0, v20 ;# 64 + 4 positive taps 110 vmuloub v23, \P0, v20 166 compute_sum_sse \V, v16, v18, v19, v20, v21, v23 233 vspltish v20, 8 235 vslh v18, v20, v18 ;# 0x0040 0040 0040 0040 0040 0040 0040 004 [all...] |
/external/flac/libFLAC/ppc/as/ |
lpc_asm.s | 232 vmulosh v20,v0,v8 ; v20: sum vector 238 vaddsws v20,v20,v21 243 vaddsws v20,v20,v21 248 vaddsws v20,v20,v21 253 vaddsws v20,v20,v2 [all...] |
/external/flac/libFLAC/ppc/gas/ |
lpc_asm.s | 234 vmulosh v20,v0,v8 # v20: sum vector 240 vaddsws v20,v20,v21 245 vaddsws v20,v20,v21 250 vaddsws v20,v20,v21 255 vaddsws v20,v20,v2 [all...] |