| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 291 SDValue SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2);
292 SDValue SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2,
295 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
308 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
310 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
619 SDValue N0, N1, N2;
620 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
673 SDValue N0, SDValue N1) {
674 EVT VT = N0.getValueType();
675 if (N0.getOpcode() == Opc)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
